Datasheet

MAX4533
Quad, Rail-to-Rail, Fault-Protected,
SPDT Analog Switch
______________________________________________________________________________________ 11
Test Circuits/Timing Diagrams (continued)
50%
V
O1
V
O2
0.9V
O
+3V
0V
V
COM
0V
V
COM
LOGIC
INPUT
SWITCH
OUTPUT
SWITCH
OUTPUT
+15V
V+
NO
V-
-15V
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
LOGIC 0 INPUT.
GND
LOGIC
INPUT
0V
0.9V
O
t
D
t
D
R
L2
NC
C
L2
V
O2
V
O1
C
L1
R
L
= 1000Ω
C
L
= 35pF
COM_
V
COM
R
L1
IN_
MAX4533
Figure 3. Break-Before-Make
0V
V+
V
IN_
∆ V
OUT
IS THE MEASURED VOLTAGE DUE TO CHARGE-
TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF.
∆ V
OUT
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION. Q = ∆ V
OUT
x C
L
V
OUT
V+
V
OUT
V
IN_
GND
V+
V-
V-
IN_
NC_ OR NO_
V
COM_
MAX4533
50Ω
C
L
100pF
Figure 4. Charge Injection
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION.
V+
V+
GND
V+
V-
V-
IN_
NO_
COM_
MAX4533
NC_
ADDRESS SELECT
1MHz
CAPACITANCE
ANALYZER
Figure 5. COM_, NO_, NC_ Capacitance