Datasheet

MAX4410
80mW, DirectDrive Stereo Headphone Driver
with Shutdown
16 ______________________________________________________________________________________
Output Capacitor (C2)
The output capacitor value and ESR directly affect the
ripple at PV
SS
. Increasing the value of C2 reduces out-
put ripple. Likewise, decreasing the ESR of C2
reduces both ripple and output resistance. Lower
capacitance values can be used in systems with low
maximum output power levels. See the Output Power
vs. Charge-Pump Capacitance and Load Resistance
graph in the Typical Operating Characteristics.
Power-Supply Bypass Capacitor
The power-supply bypass capacitor (C3) lowers the out-
put impedance of the power supply, and reduces the
impact of the MAX4410’s charge-pump switching tran-
sients. Bypass PV
DD
with C3, the same value as C1, and
place it physically close to the PV
DD
and PGND pins
(refer to the MAX4410 EV kit for a suggested layout).
Adding Volume Control
The addition of a digital potentiometer provides simple
volume control. Figure 5 shows the MAX4410 with the
MAX5408 dual log taper digital potentiometer used as
an input attenuator. Connect the high terminal of the
MAX5408 to the audio input, the low terminal to ground
and the wiper to C
IN
. Setting the wiper to the top posi-
tion passes the audio signal unattenuated. Setting the
wiper to the lowest position fully attenuates the input.
Layout and Grounding
Proper layout and grounding are essential for optimum
performance. Connect PGND and SGND together at a
single point on the PC board. Connect all components
associated with the charge pump (C2 and C3) to the
PGND plane. Connect PV
DD
and SV
DD
together at the
device. Connect PV
SS
and SV
SS
together at the
device. Bypassing of both supplies is accomplished
by charge-pump capacitors C2 and C3 (see Typical
Application Circuit). Place capacitors C2 and C3 as
close to the device as possible. Route PGND and all
traces that carry switching transients away from SGND
and the traces and components in the audio signal
path. Refer to the layout example in the MAX4410 EV
kit datasheet.
When using the MAX4410 in a UCSP package, make
sure the traces to OUTR (bump C2) are wide enough
to handle the maximum expected current flow. Multiple
traces may be necessary.
UCSP Considerations
For general UCSP information and PC layout consider-
ations, refer to the Maxim Application Note: Wafer-
Level Ultra Chip-Scale Package.
OUTL
MAX4410
INL
10
MAX5408
H0
L0
5
6
W0A
7
LEFT AUDIO
INPUT
13
W1A
10
C
IN
R
IN
C
IN
RIGHT AUDIO
INPUT
INR
OUTR
R
F
R
F
11
8
H1
L1
12
11
R
IN
Figure 5. MAX4410 and MAX5408 Volume Control Circuit