Datasheet
Detailed Description
Rail-to-Rail Input Stage
The MAX4291/MAX4292/MAX4294 have rail-to-rail
inputs and output stages that are specifically designed
for low-voltage, single-supply operation in the smallest
package possible. The input stage consists of separate
NPN and PNP differential stages, which operate togeth-
er to provide a common-mode range extending to both
supply rails. The crossover region of these two pairs
occurs halfway between V
CC
and V
EE
. The input offset
voltage is typically ±200µV (MAX4292/MAX4294). Low
operating supply voltage, low supply current, rail-to-rail
common-mode input range, and rail-to-rail outputs
make this family of operational amplifiers (op amps) an
excellent choice for precision or general-purpose, low-
voltage, battery-powered systems.
Since the input stage consists of NPN and PNP pairs,
the input bias current changes polarity as the common-
mode voltage passes through the crossover region.
Match the effective impedance seen by each input to
reduce the offset error caused by input bias currents
flowing through external source impedances (Figures
1a and 1b).
The combination of high-source impedance plus input
capacitance (amplifier input capacitance plus stray
MAX4291/MAX4292/MAX4294
Ultra-Small, 1.8V, µPower,
Rail-to-Rail I/O Op Amps
8 _______________________________________________________________________________________
Pin Description
R3
IN
R3 = R1 R2
R1 R2
MAX4291
MAX4292
MAX4294
R3
R3 = R1 R2
R1 R2
MAX4291
MAX4292
MAX4294
IN
Figure 1a. Minimizing Offset Error Due to Input Bias Current
(Noninverting)
Figure 1b. Minimizing Offset Error Due to Input Bias Current
(Inverting)
PIN
MAX4292
MAX4291
µMAX/SO UCSP
MAX4294
NAME FUNCTION
1 ——— IN+ Noninverting Input
2 4 C2 11
V
EE
Negative Supply. Connect to ground for
single-supply operation.
3 ——— IN- Inverting Input
4 ——— OUT Amplifier Output
5 8 A2 4
V
CC
Positive Supply
— 1, 7 A1, A3 1, 7 OUTA, OUTB Outputs for Amplifiers A and B
— 2, 6 B1, B3 2, 6 INA-, INB- Inverting Inputs to Amplifiers A and B
— 3, 5 C1, C3 3, 5 INA+, INB+ Noninverting Inputs to Amplifiers A and B
———8, 14 OUTC, OUTD Outputs for Amplifiers C and D
———9, 13 INC-, IND- Inverting Inputs to Amplifiers C and D
———10, 12 INC+, IND+ Noninverting Inputs to Amplifiers C and D