Datasheet

Choose gain-setting resistors R
IN
and R
F
according to
the amount of desired gain, keeping in mind the maximum
output amplitude. The output coupling capacitor, C
OUT
,
blocks the DC component of the amplifier output, prevent-
ing DC current flowing to the load. The output capacitor
and the load impedance form a highpass filer with the
-3dB point determined by:
3dB
IN OUT
1
f
2R C
−
=
π
For a 32Ω load, a 100μF aluminum electrolytic capacitor
gives a low-frequency pole at 50Hz.
Bridge Amplier
The circuit shown in Figure 3 uses a dual MAX4230 to
implement a 3V, 200mW amplifier suitable for use in size-
constrained applications. This configuration eliminates
the need for the large coupling capacitor required by the
single op-amp speaker driver when single-supply opera-
tion is necessary. Voltage gain is set to 10V/V; however,
it can be changed by adjusting the 82kΩ resistor value.
Rail-to-Rail Input Stage
The MAX4230–MAX4234 CMOS op amps have parallel
connected n- and p-channel differential input stages that
combine to accept a common-mode range extending
to both supply rails. The n-channel stage is active for
common-mode input voltages typically greater than (V
SS
+ 1.2V), and the p-channel stage is active for common-
mode input voltages typically less than (V
DD
-1.2V).
Rail-to-Rail Output Stage
The minimum output is within millivolts of ground for
single-supply operation, where the load is referenced to
ground (V
SS
). Figure 4 shows the input voltage range
and the output voltage swing of a MAX4230 connected
as a voltage follower. The maximum output voltage swing
is load dependent; however, it is guaranteed to be within
500mV of the positive rail (V
DD
= 2.7V) even with maxi-
mum load (32Ω to ground).
Observe the Absolute Maximum Ratings for power dis-
sipation and output short-circuit duration (10s, max)
because the output current can exceed 200mA (see the
Typical Operating Characteristics.)
Input Capacitance
One consequence of the parallel-connected differential
input stages for rail-to-rail operation is a relatively large
input capacitance C
IN
(5pF typ). This introduces a pole
at frequency (2πR′C
IN
)
-1
, where R′ is the parallel com-
bination of the gain-setting resistors for the inverting or
noninverting amplifier configuration (Figure 5). If the pole
frequency is less than or comparable to the unity-gain
bandwidth (10MHz), the phase margin is reduced, and
the amplifier exhibits degraded AC performance through
either ringing in the step response or sustained oscilla-
tions. The pole frequency is 10MHz when R′ = 2kΩ. To
maximize stability, R′ << 2kΩ is recommended.
Figure 3. Dual MAX4230/MAX4231 Bridge Amplifier for 200mW
at 3V
Figure 4. Rail-to-Rail Input/Output Range
1
6
7
5
2
8
3V
3V
3
4
1/2
MAX4232
1/2
MAX4232
0.5V
P-P
R5
51kΩ
R1
16kΩ
R2
82kΩ
R4
10kΩ
32W
f
S
= 100Hz
R3
10kΩ
R6
51kΩ
C2
0.1µF
C1
0.1mF
IN
1V/div
OUT
1V/div
5µs/div
V
CC
= 3.0V
R
L
= 100kΩ
MAX4230–MAX4234 High-Output-Drive, 10MHz, 10V/μs,
Rail-to-Rail I/O Op Amps with Shutdown in SC70
www.maximintegrated.com
Maxim Integrated │ 10