Datasheet

22 _____________________________________________________________________________________
MAX3945
1.0625Gbps to 11.3Gbps,
SFP+ Dual-Path Limiting Amplifier
Table 12. Register Map (continued)
REGISTER
FUNCTION/
ADDRESS
REGISTER
NAME
NORMAL
MODE
SETUP
MODE
BIT NUMBER/
TYPE
BIT NAME
DEFAULT
VALUE
NOTES
CML Output
Level
Setting
Register
Address =
H0x03
SET_CML
R RW 7 SET_CML[7] 0
MSB output level
DAC
R RW 6 SET_CML[6] 1
R RW 5 SET_CML[5] 0
R RW 4 SET_CML[4] 1
R RW 3 SET_CML[3] 1
R RW 2 SET_CML[2] 1
R RW 1 SET_CML[1] 0
R RW 0 SET_CML[0] 0
LSB output level
DAC
LOS
Threshold
Assert Level
Setting
Register
Address =
H0x04
SET_LOS
R RW 5 SET_LOS[5] 0
MSB LOS thresh-
old DAC
R RW 4 SET_LOS[4] 0
R RW 3 SET_LOS[3] 1
R RW 2 SET_LOS[2] 1
R RW 1 SET_LOS[1] 0
R RW 0 SET_LOS[0] 0
LSB LOS thresh-
old DAC
General
Control
Register
Address =
H0x0E
MODECTRL
RW RW 7 MODECTRL[7] 0
MSB mode con-
trol
RW RW 6 MODECTRL[6] 0
RW RW 5 MODECTRL[5] 0
RW RW 4 MODECTRL[4] 0
RW RW 3 MODECTRL[3] 0
RW RW 2 MODECTRL[2] 0
RW RW 1 MODECTRL[1] 0
RW RW 0 MODECTRL[0] 0
LSB mode con-
trol
LOS Timer
Setting
Register
Address =
H0x12
SET_LOSTIMER
R RW 6 SET_LOSTIMER[6] 0
MSB LOS timer
R RW 5 SET_LOSTIMER[5] 0
R RW 4 SET_LOSTIMER[4] 0
R RW 3 SET_LOSTIMER[3] 0
R RW 2 SET_LOSTIMER[2] 0
R RW 1 SET_LOSTIMER[1] 0
R RW 0 SET_LOSTIMER[0] 0
LSB LOS timer