Datasheet

MAX3761/MAX3762
Capacitor Selection
A typical MAX3761/MAX3762 implementation requires
four external capacitors. To select the capacitors, first
determine the following parameters in the receiver sys-
tem (see the
Applications Information section for rec-
ommendations in 622Mbps ATM and Fibre Channel
1063Mbps systems):
1) The duration of the expected longest run of consec-
utive bits in the data stream. For example, 72 con-
secutive zeros in a 622Mbps data stream have a
duration of 116ns.
2) The maximum allowable data-dependent jitter.
3) The desired power-detector integration time con-
stant [1/ (2πf
INT
)].
4) The transimpedance amplifier’s maximum peak-to-
peak output voltage.
Step 1. Select the Input AC-Coupling Capacitors (C
IN
).
When using a limiting preamplifier with a highpass
frequency response, select C
IN
to provide a low-
frequency cutoff (f
C
) one decade lower than the
preamplifier low-frequency cutoff. This causes nearly all
data-dependent jitter (DDJ) to be generated in the pre-
amplifer circuit. For example, if the preamplifier’s low-
frequency cutoff is 150kHz, then select C
IN
to provide a
15kHz low-frequency cutoff.
Select C
IN
with the following equation:
For differential input signals, use a capacitor equal to
C
IN
on both inputs (VIN+ and VIN-). For single-ended
input signals, one capacitor should be tied to VIN+ and
another should decouple VIN- to ground.
When using a preamplifier without a highpass
response, select C
IN
to ensure that data-dependent jit-
ter is acceptable. The following equation provides an
estimate for C
IN
:
where: t
L
= duration of the longest run of consecutive
bits with the same value (seconds); DDJ = maximum
allowable data-dependent jitter, peak-to-peak (seconds);
BW = typical system bandwidth, normally 0.6 to 1.0
times the data rate (hertz).
Regardless of which method is used to select C
IN
, the
maximum LOS assert time can be estimated from the
value of C
IN
. The following equation estimates LOS time
delay when the maximum-amplitude signal is instanta-
neously removed from the input, and when the FILTER
time constant is much faster than the input time con-
stant (C
FILTER
< 0.4C
IN
):
t
LOS ASSERT
= 1950C
IN
ln(V
MAXp-p
/ V
ASSERTp-p
)
where V
MAXp-p
is the maximum output of the preampli-
fier, and V
ASSERTp-p
is the input amplitude that causes
LOS to assert. The equation describes the input capac-
itors’ discharge time, from maximum input to the LOS
threshold into the 1950Ω, single-ended input resis-
tance.
Step 2. Select the Offset-Correction Capacitor (C
AZ
).
To maintain stability, it is important to keep a one-
decade separation between f
C
and the low-frequency
cutoff associated with the DC-offset-correction circuit
(f
OC
).
The input impedance between CZP and CZN is
approximately 800kΩ in parallel with 10pF. As a result,
the low-frequency cutoff (f
OC
) associated with the DC-
offset-correction loop is computed as follows:
where C
AZ
is an optional external capacitor between
CZP and CZN.
If C
IN
is known, then:
Step 3. Select the Power-Detect Integration Capacitor
(C
FILTER
). For 622Mbps ATM applications, Maxim rec-
ommends a filter frequency of 3MHz, which requires
C
FILTER
= 100pF. The integration frequency can be
selected lower to remove low-frequency noise, or to
prevent unusual data sequences from asserting LOS.
C
FILTER
= 1 / ( 2π500f
INT
)
where f
INT
is the integration frequency.
C
C
pF
AZ
IN
≥−
41
10
f=
1
2 800k
OC
πΩCpF
AZ
+
()
10
C
-
IN
L
≥
−
()()
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥
t
DDJ BW
1950 1
05
ln
.
C=
1
2 f 1950
IN
C
πΩ
Low-Power, 622Mbps Limiting Amplifiers
with Chatter-Free Power Detect for LANs
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