Datasheet

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MAX3748H
Compact, Low-Power, 155Mbps to 4.25Gbps
Limiting Amplifier
CML Output Buffer
The MAX3748H limiting amplifier’s CML output provides
high tolerance to impedance mismatches and inductive
connectors. The output current is approximately 18mA.
The output is disabled by connecting the DISABLE pin to
V
CC
. If the LOS pin is connected to the DISABLE pin, the
outputs OUT+ and OUT- are at a static voltage (squelch)
whenever the input signal level drops below the LOS
threshold. The output buffer can be AC- or DC-coupled
to the load (Figure 4).
Power-Detect and Loss-of-Signal Indicator
The MAX3748H is equipped with LOS circuitry, which
indicates when the input signal is below a programmable
threshold, set by resistor R
TH
at the TH pin (see the
Typical Operating Characteristics for appropriate resis-
tor sizing). An averaging peak-power detector compares
the input signal amplitude with this threshold and feeds
the signal detect information to the LOS output, which
is open collector. Two control voltages, V
ASSERT
and
V
DEASSERT
, define the LOS assert and deassert levels.
To prevent LOS chatter in the region of the programmed
threshold, approximately 2dB of hysteresis is built into
the LOS assert/deassert function. Once asserted, LOS
is not deasserted until the input amplitude rises to the
required level (V
DEASSERT
) (Figure 5).
Design Procedure
Program the LOS Assert Threshold
External resistor R
TH
programs the LOS threshold. See
the Assert/Deassert Levels vs. R
TH
graph in the Typical
Operating Characteristics to select the appropriate resistor.
Select the Coupling Capacitor
When AC-coupling is desired, coupling capacitors C
IN
and C
OUT
should be selected to minimize the receiver’s
deterministic jitter. Jitter is decreased as the input low-
frequency cutoff (f
IN
) is decreased:
f
IN
= 1/[2π(50)(C
IN
)]
For ATM/SONET or other applications using scrambled
NRZ data, select (C
IN
, C
OUT
) ≥ 0.1μF, which provides
f
IN
< 32kHz. For Fibre Channel, Gigabit Ethernet, or other
applications using 8B/10B data coding, select (C
IN
,
C
OUT
) ≥ 0.01μF, which provides f
IN
< 320kHz. Refer to
Application Note 292: HFAN-1.1: Choosing AC-Coupling
Capacitors.
Figure 4. CML Output Buffer Figure 5. MAX3748H LOS Output Circuit
Q3 Q4 Q1
V
CC
50Ω50Ω
Q2
18mA 18mA
DISABLE
DISABLE
DISABLE
DATA
OUT+
OUT-
ESD
STRUCTURES
GND
ESD
STRUCTURE
V
CC
LOS