Datasheet

MAX3747A/MAX3747B
155Mbps to 3.2Gbps, Low-Power SFP
Limiting Amplifiers
3
Maxim Integrated
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +2.97V to +3.63V, CML output load is 50Ω to V
CC
, T
A
= -40°C to +85°C. Typical values are at V
CC
= +3.3V and T
A
= +25°C,
unless otherwise specified.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input-Referred Noise V
IN
= 4mV
P-P
(Note 4) 120 150 µV
RMS
Low-Frequency Cutoff 6.4 kHz
LOS Hysteresis 10log(V
DEASSERT
/ V
ASSERT
) (Note 4) 1.25 dB
MAX3747A (Notes 4, 8)
LOS Assert/Deassert Time
MAX3747B (Notes 4, 8, 9)
2.3 40.0 µs
Low LOS Assert Level V
TH
= -1.3V (Notes 4, 10) 2.5 4.1 5.9 mV
P
-
P
Low LOS Deassert Level V
TH
= -1.3V (Notes 4, 10) 6.2 9.3 mV
P
-
P
Medium LOS Assert Level V
TH
= -0.68V (Notes 4, 10) 22.0 29.0 36.0 mV
P
-
P
Medium LOS Deassert Level V
TH
= -0.68V (Notes 4, 10) 44.8 62.0 mV
P
-
P
High LOS Assert Level V
TH
= -0.114V (Notes 4, 10) 36.0 53.7 63.6 mV
P
-
P
High LOS Deassert Level V
TH
= -0.114V (Notes 4, 10) 86.0 115 mV
P
-
P
TTL/CMOS I/O
V
REF
Voltage V
REF
V
CC
-
1.35
V
CC
-
1.3V
V
CC
-
1.19
V
LOS Output High Voltage V
OH
R
LOS
= 4.7kΩ to 10kΩ to V
CC_HOST
(3V) 2.4 V
LOS Output Low Voltage V
OL
R
LOS
= 4.7kΩ to 10kΩ to V
CC_HOST
(3.6V) 0.4 V
DISABLE Input High V
IH
2.0 V
DISABLE Input Low V
IL
0.8 V
DISABLE Input Current R
LOS
= 4.7kΩ to 10kΩ to V
CC_HOST
10 µA
Note 1: The data-input transition time is controlled by a 4th-order Bessel filter with f
-3dB
= 0.75 x 2.667GHz for all data rates of
2.667Gbps and below. The f
-3db
= 0.75 x 3.2GHz for a data rate of 3.2Gbps.
Note 2: Supply current is measured with unterminated outputs or with AC-coupled output termination (see Figure 1).
Note 3: Between sensitivity and overload, all AC specifications are met and the output is 0.95 x limited output amplitude.
Note 4: Guaranteed by design and characterization.
Note 5: The deterministic jitter (DJ) caused by the input filter is not included in the DJ generation specification.
Note 6: The PRBS 2
23
- 1 equivalent pattern consists of a K28.5 pattern plus 240 ones plus K28.5 pattern plus 240 zeros.
Note 7: Random jitter was measured without using a filter at the input.
Note 8: The signal at the input is switched between two amplitudes, Signal_ON and Signal_OFF, as shown in Figure 2A.
Note 9: The signal at the input is switched between 1.2V
P-P
and Signal_OFF as shown in Figure 2B.
Note 10: V
TH
is the voltage at pin 5 referenced to V
CC
(see Figure 5).