Datasheet

MAX3690
+3.3V, 622Mbps, SDH/SONET 8:1 Serializer
with Clock Synthesis and TTL Inputs
6 _______________________________________________________________________________________
__________Applications Information
Alternative PECL-Output Termination
Figure 3 shows alternative PECL-output-termination
methods. Use Thevenin-equivalent termination when a
(V
CC
- 2V) termination voltage is not available. If AC
coupling is necessary, be sure that the coupling
capacitor is placed following the 50Ω or Thevenin-
equivalent DC termination.
Layout Techniques
For best performance, use good high-frequency layout
techniques. Filter voltage supplies and keep ground
connections short. Use multiple vias where possible.
Also, use controlled-impedance transmission lines to
interface with the MAX3690 data outputs.
MAX3690
SD+
SD-
V
CC
- 2V
50Ω 50Ω
Z
0
= 50Ω
HIGH-
IMPEDENCE
INPUTS
Z
0
= 50Ω
MAX3690
SD+
SD-
+3.3V
130Ω
130Ω
82Ω 82Ω
Z
0
= 50Ω
PECL
INPUTS
Z
0
= 50Ω
Figure 3. Alternative PECL-Output Termination