Datasheet
MAX3676
622Mbps, 3.3V Clock-Recovery and
Data-Retiming IC with Limiting Amplifier
6 _______________________________________________________________________________________
Pin Description
32 CFILT RSSI Filter Capacitor Input. Connect a 47nF capacitor between CFILT and V
CC
.
30 ADI+ Positive Analog Data Input, 622.08Mbps serial-data stream
29 ADI- Negative Analog Data Input, 622.08Mbps serial-data stream
28 INSEL Input Select. Connect to GND to select digital data inputs or V
CC
for analog data inputs.
27 DDI- Negative Digital Data Input, PECL, 622.08Mbps serial-data stream
26 DDI+ Positive Digital Data Input, PECL, 622.08Mbps serial-data stream
23 FIL+ Positive Filter Input. PLL loop filter connection. Internally connected to V
CC
.
22 FIL- Negative Filter Input. PLL loop filter connection. Connect a 2.2μF capacitor between FIL- and FIL+.
20 PHADJ+ Positive Phase-Adjust Input. Used to optimally align internal PLL phase. Attach to V
CC
if not used.
19 PHADJ- Negative Phase-Adjust Input. Used to optimally align internal PLL phase. Attach to V
CC
if not used.
NAME FUNCTION
1 OLC+ Positive Offset-Correction Loop Capacitor Input
2 OLC- Negative Offset-Correction Loop Capacitor Input
PIN
3 RSSI Received-Signal-Strength Indicator Output
4, 8, 16,
24, 25
GND Supply Ground
9, 12, 15,
18, 21, 31
V
CC
Positive Supply Voltage
7 LOP
Loss-of-Power Output, TTL. Limiting amplifier loss-of-power monitor. Asserts high when input signal
is below threshold set by VTH.
6 VTH
Voltage Threshold Input. Threshold voltage for loss-of-power monitor. Attach to V
CC
if LOP function
is not used.
5 INV Op Amp Inverting Input. Attach to ground if op amp is not used.
17
LOL
Loss-of-Lock Output, TTL. PLL loss-of-lock monitor, active low (see the
Design Procedure
section).
14 SDO+ Positive Serial-Data Output, PECL, 622.08Mbps
13 SDO- Negative Serial-Data Output, PECL, 622.08Mbps
11 SCLKO+ Positive Serial-Clock Output, PECL, 622.08MHz. SDO+ is clocked out on the rising edge of SCLKO+.
10 SCLKO- Negative Serial-Clock Output, PECL, 622.08MHz. SDO- is clocked out on the falling edge of SCLKO-.