Datasheet

MAX361/MAX362
Precision, Quad, SPST Analog Switches
_______________________________________________________________________________________ 7
t
OFF
0.8V
O
V
O
0.8V
O
t
f
< 20ns
t
r
< 20ns
50%
0V
V
COM
0V
+3V
SWITCH
INPUT
SWITCH
OUTPUT
LOGIC INPUT WAVEFORM IS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
t
ON
SWITCH
INPUT
LOGIC
INPUT
+3V
1N_
COM_
+15V
V+
V-
-15V
R
L
35pF
V
O
NO_ OR NC_
FOR LOAD CONDITIONS, SEE SPECIFICATIONS
C
L
(INCLUDES FIXTURE AND STRAY CAPACITANCE)
GND
REPEAT TEST FOR CHANNELS 2, 3, AND 4.
V
O
= V
COM
RL
R
L
+ R
ON
LOGIC
INPUT
V
COM
∆V
O
OFFONOFF
V
O
IN_
MAX361
IN_
MAX362
OFF OFFON
Q = ∆V
O
× C
L
-15V
V-
V+
IN_GND
COM_
+15V
R
GEN
V
GEN
V
IN
= +3V
C
L
V
O
NO_
OR NC_
ANALYZER
SIGNAL
GENERATOR
R
GEN
= 50Ω
0.8V, 2.4V
NC1 OR NO1
IN1
COM2
GND
R
L
10dBm
C
V+
+15V
COM1
IN2
NC2 OR NO2
0.8V, 2.4V
50Ω
V-
-15V
C
ANALYZER
SIGNAL
GENERATOR
R
GEN
= 50Ω
NC_ OR
NO_
COM
GND
R
L
10dBm
C
V+
+15V
IN_
0.8V, 2.4V
V-
-15V
C
Figure 1. Switching-Time Test Circuit
Figure 2. Charge-Injection Test Circuit
Figure 3. Crosstalk Test Circuit (repeat for channels 3 and 4)
Figure 4. Off-Isolation Test Circuit