Datasheet

Table 16. TOF7 Register (continued)
BIT NAME DESCRIPTION
15:8
C_OFFSETDNR
[7:0]
Comparator Return Offset Downstream: When the MAX35101 is measuring the t
2
wave, the
programmed receive comparator offset is returned to a common-mode voltage automatically
after the early edge, t
1
,
is detected. The actual offset return voltage is dependent upon and
scales with the voltage present at the V
CC
pins. The following formula denes the comparator
return offset voltage setting, where C_OFFSETDNR is a two’s-complement number:
CC
CC
(1152+C_O
Comparator Re
FFSETDN
turn Offset Voltage V
3072
V
where 1
R
LSB
3072
)
= ×
=
C_OFFSETDNR[7:0] OFFSET (LSBs)
7Fh through 01h 127 through 1
00h 0
80h through FFh -128 through -1
7 X Reserved
6:0
C_OFFSETDN
[6:0]
Comparator Offset Downstream: These bits dene an initial selected receive comparator
offset voltage for the analog receiver comparator front-end. This comparator offset is used to
detect the early edge wave, t
1
. The actual common-mode voltage is dependent upon and scales
with the voltage present at the V
CC
pins.
When the STOP_POL bit in the TOF1 register is set to zero indicating a rising edge detection of
the zero crossing of the received acoustic wave, then the comparator offset is a positive value.
When the STOP_POL bit in the TOF1 register is set to one indicating a falling edge detection of
the zero crossing of the received acoustic wave, then the comparator offset is a negative value.
The following formulas dene the comparator offset voltage setting:
OFFSETDN
CC
OFFSETDN
CC
CC
C
STOP_POL 0 Comparator Offset Voltage V
3072
C
STOP_POL
(1152 + )
(11
1 Comparato
51- )
r Offset Voltage V
3072
V
where 1 LSB
3072
= = ×
= = ×
=
C_OFFSETDN[6:0] OFFSET (LSBs)
00h through 7Fh 0 through 127
MAX35101 Time-to-Digital Converter with Analog Front-End
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