Datasheet

Table 3. Register Memory Map (continued)
READ
OPCODE
WRITE
OPCODE
NAME BITS[15:8] BITS[7:0]
C0h 40h
Event
Timing 2
TMM4 TMM3 TMM2 TMM1 TMM0
Cal_
Use
Cal_
AUTO
Cal_
CFG1
Cal_
CFG0
TP1 TP0
PREC
YC2
PREC
YC1
PREC
YC0
PORT
CYC1
PORT
CYC0
C1h 41h
TOF
Measure-
ment Delay
DLY15 DLY14 LY13 DLY12 DLY11 DLY10 DLY9 DLY8 DLY7 DLY6 DLY5 DLY4 DLY3 DLY2 DLY1 DLY0
C2h 42h
Calibration
and Control
X X X X
CMP_
EN
CMP_
SEL
INT_
EN
ET_
CONT
CONT
_INT
CLK_
S2
CLK_
S1
CLK_
S0
Cal_P
eriod3
Cal_P
eriod2
Cal_P
eriod1
Cal_P
eriod0
C3h 43h
Real-Time
Clock
X X X X X X X X X
32K_
BP
32K_
EN
EOSC AM2 AM1 WF
WD_
EN
CONVERSION RESULTS REGISTERS
C4h
Read
Only
WVRUP
C5h
Read
Only
Hit1UpInt
C6h
Read
Only
Hit1UpFrac
C7h
Read
Only
Hit2UpInt
C8h
Read
Only
Hit2UpFrac
C9h
Read
Only
Hit3UpInt
CAh
Read
Only
Hit3UpFrac
CBh
Read
Only
Hit4UpInt
CCh
Read
Only
Hit4UpFrac
CDh
Read
Only
Hit5UpInt
CEh
Read
Only
Hit5UpFrac
CFh
Read
Only
Hit6UpInt
MAX35101 Time-to-Digital Converter with Analog Front-End
www.maximintegrated.com
Maxim Integrated │ 29