Datasheet

MAX3453E–MAX3456E
±15kV ESD-Protected USB Transceivers
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Disable Mode
Connect V
BUS
to a system power supply and leave V
L
unconnected or connect to GND. D+ and D- enter a tri-
state mode and V
BUS
(or V
BUS
and V
TRM
) consumes
less than 20µA of supply current. D+ and D- withstand
external signals up to +5.5V in disable mode (Table 2).
Sharing Mode
Connect V
L
to a system power supply and leave V
BUS
(or V
BUS
and V
TRM
) unconnected or connect to GND.
D+ and D- enter a tri-state mode, allowing other circuitry
to share the USB D+ and D- lines, and V
L
consumes less
than 20µA of supply current. D+ and D- withstand
external signals up to +5.5V in sharing mode (Table 2).
Device Control
OE
OE controls the direction of communication. Drive OE
low to transfer data from the logic side to the USB side.
For OE = low, VP and VM serve as differential driver
inputs to the USB transmitter.
Drive OE high to transfer data from the USB side to the
logic side. For OE = high, VP and VM serve as single-
ended receiver outputs from the USB inputs
(D+ and D-). RCV serves as a differential receiver out-
put, regardless of the state of OE.
ENUM (MAX3453E/MAX3454E)
The MAX3453E/MAX3454E feature an enumerate func-
tion that allows software control of USB enumeration.
USB protocol requires a 1.5kΩ pullup resistor to D+ or
D- to indicate the transmission speed to the host (see
the SPD section). The MAX3453E/MAX3454E provide
an internal 1.5kΩ pullup resistor. Disconnect the pullup
resistor from the circuit to simulate the removal of a
device from the USB. Drive ENUM low to disconnect
the internal pullup resistor. Drive ENUM high to connect
the internal pullup resistor. The SPD state (MAX3454E
only) determines whether the pullup resistor connects
to D+ or D-. For ENUM = high, the internal pullup resis-
tor connects to D+ when SPD = V
L
(full speed) or to D-
when SPD = GND (low speed). The MAX3453E only
supports full-speed operation; therefore, the pullup
resistor only connects to D+ or is disconnected.
Figure 1. Rise and Fall Times
V
OHD
V
OLD
90%
10%
90%
10%
t
FR
, t
LR
t
FF
, t
LF
Table 3a. Transmit Truth Table
(OE = 0, SUS = 0)
INPUTS OUTPUTS
VP
VM D+
D-
RCV
OUTPUT STATE
0000X SE0
0 1 0 1 0 Logic 0
1 0 1 0 1 Logic 1
1 1 1 1 X Undefined
X = Undefined.
Table 3b. Transmit Truth Table
(
OE = 0, SUS = 1)
INPUTS OUTPUTS
VP VM D+
D-
RCV
OUTPUT STATE
00000 SE0
0 1 0 1 0 Logic 0
1 0 1 0 0 Logic 1
1 1 1 1 0 Undefined
Table 4a. Receive Truth Table
(
OE = 1 and SUS = 0)
INPUTS OUTPUTS
D+
D- VP VM RCV
OUTPUT STATE
0000X SE0
01010 Logic 0
10101 Logic 1
1 1 1 1 X Undefined
X = Undefined.
Table 4b. Receive Truth Table
(
OE = 1 and SUS = 1)
INPUTS OUTPUTS
D+
D-
VP VM RCV
OUTPUT STATE
00000 SE0
01010 Logic 0
10100 Logic 1
11110 Undefined