Datasheet

MAX34451 PMBus 16-Channel V/I Monitor and
12-Channel Sequencer/Marginer
www.maximintegrated.com
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Table 39. MFR_MARGIN_CONFIG (DFh)
Table 40. Power-Supply DAC Outputs
ThedevicemarginsthepowersupplieswhenOPERATION
is set to one of the margin states. Margining of the supplies
does not begin until ALL power supplies have exceeded
theirprogrammedPOWER_GOOD_ONlevels.Whenthis
happens,thePWMorDACoutputisenabledandmargin-
ing is initiated. The device then averages four samples
ofV
OUT
foratotaltimeof20ms.IfthemeasuredV
OUT
and the target (set by either VOUT_MARGIN_HIGH or
VOUT_MARGIN_LOW)differbymorethan1%,thePWM
dutycycleortheDACsettingisadjustedbyonestep.The
direction of the duty-cycle adjustment is determined by
theSLOPEbitinMFR_MARGIN_CONFIG.Allchangesto
theDACsettingaremadeafteraveragingfoursamplesof
V
OUT
overa20msperiod.
WhentheOPERATIONcommanddeactivatesmargining,
and the margining has been running with the “Ignore All
Faults” condition, the device does not begin monitoring
forfaultsfor100msafterthe“MarginOff”inputisreceived
to allow time for the power supplies to return to a normal
condition.
Margining Faults
The device detects twopossiblemargining faults. First,
iftheinitialPWMdutycycleorDACstepcausesV
OUT
to exceed the target value (either high or low, depend-
ing on whether the device has been instructed to margin
highorlow,respectively),thiscreatesafault.Second,if
thetargetvaluecannotbereachedwhenthePWMduty
cycle or DAC reaches zero or full scale, this also cre-
ates a fault. If either margining fault occurs, the device
continues attempting to margin the power supply and
doesthefollowing:
1) SetstheMARGINbitinSTATUS_WORD.
2) Sets the MARGIN_FAULT bit in STATUS_MFR_
SPECIFIC(PAGES0–11).
3) NotifiesthehostthroughALERT assertion (if enabled
inMFR_MODE).
If a communication error occurs between the MAX34451
and the external DS4424, a fault occurs when the
MAX34451attemptstosettheDACtofullscaleandthe
target margin value is not reached.
DC_DAC Value
The DC_DAC value for the channels controlled by the
PWMn outputs can be determined by the following
formula.TheDC_DACvalueforthechannelscontrolled
bytheexternalcurrentDACis automatically configured
bythedeviceandsetto0x00h.
PWMDC_DACvalue=256x(V
FB
/V
DD
)
where V
FB
is the power-supply feedback node voltage
andV
DD
is the supply voltage.
Example:
V
FB
=0.8V,V
DD
=3.3V
PWMDC_DACvalue=256x(0.8/3.3)=62d=0x3Eh
BIT NAME MEANING
15 SLOPE
DACandPWMsettingtoresultingvoltagerelationship:
0=Negativeslope
 DACsourcecurrentresultsinalowervoltage
 IncreasingPWMdutycycleresultsinalowervoltage
1=Positiveslope
 DACsourcecurrentresultsinahighervoltage
 DecreasingPWMdutycycleresultsinahighervoltage
14 OPEN_LOOP
0=Normalclosed-loopmargining
1=PWMdutycycleorDACvaluesetconstantlytotheDC_DACvaluewhenmargininginvoked
13:8 0 Thesebitsalwaysreturna0.
7:0 DC_DAC
This8-bitvaluehastwopurposes:
1) WithPWMmargining,itisusedastheinitialPWMdutycyclewhenthedevicebeginstomargina
power supply either up or down.
2) Whenbit14isset,thisvalueisusedtosetthePWMdutycycleortheexternalcurrentDAClevel.
PAGE POWER SUPPLY DS4424 OUTPUT
8 PSEN8 OUT0
9 PSEN9 OUT1
10 PSEN10 OUT2
11 PSEN11 OUT3