Datasheet

MAX3264/MAX3265/MAX3268/MAX3269/MAX3765/MAX3768
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
12 ______________________________________________________________________________________
The buffer’s output impedance is determined by the par-
allel combination of internal and external pullup resistors,
which are chosen to match the impedance of the trans-
mission line (Figure 1). The output buffer can be AC- or
DC-coupled to the load.
PECL Output Buffer
The MAX3268/MAX3269/MAX3768 offer an industry-
standard PECL output. The PECL outputs should be
terminated to V
CC
- 2V. Figure 6 shows the PECL out-
put circuit. The squelch function forces OUT+ to a high
level and OUT- to a low level when the input is below
the programmed LOS threshold. In the 10-pin µMAX,
SQUELCH is left unconnected.
__________________Design Procedure
Program the LOS Assert Threshold
The loss-of-signal threshold is programmed by external
resistor R
TH
. See the LOS Threshold vs. R
TH
graph in
the Typical Operating Characteristics.
Select the Coupling Capacitors
The coupling capacitors (C
IN,
C
OUT
) should be select-
ed to minimize the receiver’s deterministic jitter. Jitter is
minimized when the input low-frequency cutoff (f
IN
) is
placed at a low frequency:
f
IN
= 1 / [2π(50)(C)]
For Fibre Channel, Gigabit Ethernet, or other applica-
tions using 8B/10B data coding, select (C
IN,
C
OUT
) ≥
0.01µF, which provides f
IN
< 320kHz. For ATM/SONET
or other applications using scrambled NRZ data, select
(C
IN
,C
OUT
) ≥ 0.1µF, which provides f
IN
< 32kHz.
Select the Offset-Correction Capacitor
(MAX3264/MAX3265 TSSOP Only)
To maintain stability, it is important to keep a one-
decade separation between f
IN
and the low-frequency
cutoff (f
OC
) associated with the DC-offset-correction cir-
cuit.
f
OC
= 75 / [2π 60k (C
AZ
+ 100pF)]
= 200 x 10
-6
/ (C
AZ
+ 100pF)
For Fibre Channel, Gigabit Ethernet, or other applica-
tions using 8B/10B data coding, leave pins CAZ1, and
CAZ2 open (f
OC
= 2MHz). For ATM/SONET or other
applications using scrambled NRZ data, select C
AZ
≥
0.1µF, which typically provides f
OC
= 2kHz.
GND
ESD
STRUCTURES
V
CC
OUT-
OUT+
Figure 6. PECL Output Circuit
GND LEVEL
ESD
STRUCTURES
V
CC
100Ω 100Ω
OUT-
OUT+
Figure 7. CML Output Circuit