Datasheet

MAX31913
Industrial, Octal, Digital Input
Translator/Serializer
9Maxim Integrated
Table 1. Debounce Settings
Reading Serial Data
The filtered outputs of the input comparators are
latched into a shift register at the falling edge of CS.
Clocking the CLK pin, while CS is held low, shifts the
latched data out of SOUT 1 bit at a time.
The internal data serializer comprises a 16-bit shift
register, containing 8 bits of data corresponding to
the eight field inputs, as well as an 8-bit status byte
containing supplementary status and CRC informa-
tion. The status byte contains 1 bit representing the
status of the field-supply voltage (UV), 1 bit represent-
ing the status of the internal temperature monitor (OT),
a 5-bit CRC code internally calculated and generated,
and a trailing 1 as a STOP bit.
The undervoltage (UV) bit is normally 0. If the supply
voltage falls below V
OFFUVLO
, the UV becomes a 1.
The UV bit returns to 0 once the supply voltage has
returned above V
ONUVLO
.
The overtemperature (OT) bit is also normally 0. If
the junction temperature increases to above T
ALRM
,
the OT bit becomes a 1. The bit returns to 0 once the
junction temperature has returned below T
ALRM
.
The CRC code can be used to check data integrity during
transfer from the device to an external microcontroller. In
applications where the integrity of data transferred is not
of concern, the CRC bits can be ignored. The CRC uses
the following polynomial:
P(x) = x
5
+ x
4
+ x
2
+ x
0
The number of bits in the internal serializer can be
selected between 8 bits or 16 bits. The MODESEL
pin is used to configure the serializer as an 8-bit
(disabling the status byte) or 16-bit shift register.
In 8-bit mode, only the eight field input states are
transferred through the SPI port and the status byte is
ignored. Therefore, in multiple IC applications (input
channels greater than 8), if desired, only a single
status byte can be generated and transmitted for any
number of input channels.
The shift register contents are read only (no write
capability exists) through the SPI-compatible
interface.
For higher input counts than 8, multiple devices can
be cascaded. In this case, the SOUT pin of one
device should be connected to the SIN pin of the next
device, effectively cascading the internal shift regis-
ters. The CLK and CS pins of all the devices should be
connected together in this configuration. See the
Serial-Port Operation section for more detailed
information on operating the SPI interface.
Temperature Monitoring
The internal junction temperature of the device is
constantly monitored. An alarm is raised, by asserting the
OT bit to a 1.
Supply Voltage Monitoring
A primary supply voltage monitor circuit constantly
monitors the field-supply voltage. If this voltage falls
below a threshold (V
OFFUV1
), an alarm is raised by
asserting the FAULT pin, indicating that the part is expe-
riencing a fault condition and the data in the serializer is
not to be trusted. In addition, the device resets the UV1
bit to a 0. Once the field-supply voltage has recovered
and goes above V
ONUV1
, the FAULT pin is released. A
secondary supply voltage monitor circuit also monitors
the field-supply voltage. This secondary monitor only
raises a flag in the serializer, by resetting the UV2 bit to
0 (it does not assert the FAULT pin), if the field supply
drops below V
OFFUV2
. Once the supply voltage goes
back above V
ONUV2
, the UV2 bit is set to 1. The second-
ary supply monitor has higher trip points and its purpose
is to warn the system that the supply voltage is below
specifications (approximately 24V - 20%). Whereas the
purpose of the primary supply monitor is to warn that
the supply voltage has dropped to a value close to the
minimum operating voltage of the IC.
DB1 DB0 BINARY VALUE DEBOUNCE TIME
0 0 0 0
0 1 1
25Fs
1 0 2 0.75ms
1 1 3 3ms