Datasheet
Table Of Contents
- General Description
- Features
- Applications
- Block Diagram
- Absolute Maximum Ratings
- Package Thermal Characteristics
- Recommended Operating Conditions
- DC Electrical Characteristics
- AC Electrical Characteristics
- AC Electrical Characteristics: SPI Interface
- Typical Operating Characteristics
- Pin Configuration
- Pin Description
- Typical Application Circuit
- Detailed Description
- Applications Information
- Serial-Port Operation
- Chip Information
- Ordering Information
- Package Information
- Revision History
- LIST OF FIGURES
- LIST OF TABLES

MAX31911
Industrial, Octal, Digital Input
Translator/Serializer
8Maxim Integrated
Basic Application Circuit
Detailed Description
Input Current Clamp
The MAX31911 industrial interface serializer inputs
(IN1–IN8) sense the state (on vs. off) of field sen-
sors by monitoring both voltage and current flowing
through the sensor output. The current sinking through
these input pins rises linearly with input voltage until
the limit set by the current clamp is reached. Any volt-
age increase beyond this point does not increase the
input current any further.
The value of the current clamp is adjustable through
an external resistor connected between the RIREF pin
and GND. Pins RT1–RT8 must be connected directly
to GND to provide a return path for the input current.
The voltage and current at the IN1–IN8 input pins are
compared against internally set references to deter-
mine whether the sensor is on (logic 1) or off (logic
0). The trip points determining the on/off status of the
sensor satisfy the requirements of IEC 61131-2 Type
1 and 3 switches. The device can also be configured
to work as a Type 2 switch.
Glitch Filter
A digital glitch filter provides debouncing and filtering
of noisy sensor signals. The time constant of this filter
is programmable from 0ms to 3ms through the DB0
and DB1 pins. See Table 1 for debounce settings.
To provide the digital glitch filter, the device checks
that an input is stable for at least three clock cycles.
The duration of a clock cycle is 1/3 of the selected
debounce time. If the input is not stable for at least
three clock cycles, the input change is not sent to the
internal shift register.
GND
MODESEL
DB1
DB0
5VOUT
SIN
CLK
CS
SOUT
FAULT
CLK
CS
SOUT
FAULT
ISOLATION
JUMPERS TO
5VOUT
AND GND
C4
VDD_LOGIC
R
REF
R
INX
R1
24V
f
IN1–8
RIREF
C1
IN1–8
RT1–8
V
CC24V
MAX31911
NOTE: SEE FIGURE 1 FOR ADDITIONAL
COMPONENTS NEEDED FOR EMC.










