Datasheet

1-Wire Bus System
The 1-Wire bus system uses a single bus master to con-
trol one or more slave devices. The MAX31820PAR is
always a slave. When there is only one slave on the bus,
thesystemisreferredtoasasingle-dropsystem;thesys-
tem is multidrop if there are multiple slaves on the bus. All
data and commands are transmitted least significant bit
first over the 1-Wire bus.
The following discussion of the 1-Wire bus system is
broken down into three topics: hardware configuration,
transaction sequence, and 1-Wire signaling (signal types
and timing).
Hardware Conguration
The 1-Wire bus has, by definition, only a single data line.
Each device (master or slave) interfaces to the data line
through an open-drain or three-state port. This allows
each device to release the data line when the device is
not transmitting data so the bus is available for use by
another device. The 1-Wire port of the MAX31820PAR
(theDQpin)isopendrainwithaninternalcircuitequiva-
lent to that shown in
Figure5.
The 1-Wire bus requires an external pullup resis-
tor of approximately 5kΩ; thus, the idle state for the
1-Wire bus is high. If for any reason a transaction needs
to be suspended, the bus must be left in the idle state if
the transaction is to resume. Infinite recovery time can
occur between bits so long as the 1-Wire bus is in the
inactive (high) state during the recovery period. If the bus
is held low for more than 480µs, all components on the
bus will be reset. Additionally, to ensure that the device
has sufficient supply current during temperature conver-
sions, it is necessary to provide a strong pullup (such as
a MOSFET) on the 1-Wire bus whenever temperature
conversions or EEPROM writes are taking place (as
described in the Parasite Power section.
Transaction Sequence
The transaction sequence for accessing the device is as
follows:
1) Step1:Initialization
2) Step2:ROMcommand(followedbyanyrequireddata
exchange)
3) Step3:MAX31820PARFunctioncommand(followed
by any required data exchange)
It is very important to follow this sequence every time
the device is accessed, as the device does not respond
if any steps in the sequence are missing or out of order.
Exceptions to this rule are the Search ROM [F0h] and
Alarm Search [ECh] commands. After issuing either of
theseROMcommands,themastermustreturntoStep1
in the sequence.
Initialization
All transactions on the 1-Wire bus begin with an initializa-
tion sequence. The initialization sequence consists of a
reset pulse transmitted by the bus master, followed by
presence pulse(s) transmitted by the slave(s). The pres-
ence pulse lets the bus master know that slave devices
(such as the MAX31820PAR) are on the bus and are
ready to operate. Timing for the reset and presence
pulses is detailed in the 1-Wire Signaling section.
Figure 5. Hardware Configuration
R
X
4.7kΩ
5µA
TYP
V
PU
MICROPROCESSOR
100
Ω
MOSFET
T
X
R
X
T
X
DQ
PIN
1-Wire BUS
STRONG
PULLUP
MAX31820PAR 1-Wire PORT
R
X
= RECEIVE
T
X
= TRANSMIT
V
PU
MAX31820PAR 1-Wire, Parasite-Power,
Ambient Temperature Sensor
www.maximintegrated.com
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