Datasheet

6-Channel Intelligent Fan Controller
MAX31785
11
Pin Description (continued)
Note: All pins except V
DD
, V
SS
, REG18, REG25, ADC, and the EP are high impedance with a 50µA pullup during device power-up
and reset. After device reset, the weak pullup is removed, and the pin is configured as input or output.
PIN NAME FUNCTION
20 PWM3
Fan PWM Output #3. CMOS push-pull output. Low when the fan is disabled. A 100% duty cycle
implies this pin is continuously high.
22 REG18
Regulator for Low-Voltage Digital Circuitry. Bypass REG18 to V
SS
with 1FF and 10nF capacitors. Do
not connect other circuitry to this pin.
23 TACH3 Fan Tachometer Input
24 PWM2
Fan PWM Output #2. CMOS push-pull output. Low when the fan is disabled. A 100% duty cycle
implies this pin is continuously high.
25 TACH2 Fan Tachometer Input
26 PWM1
Fan PWM Output #1. CMOS push-pull output. Low when the fan is disabled. A 100% duty cycle
implies this pin is continuously high.
27 TACH1 Fan Tachometer Input
28 PWM0
Fan PWM Output #0. CMOS push-pull output. Low when the fan is disabled. A 100% duty cycle
implies this pin is continuously high.
29 REG25
Regulator for Analog Circuitry. Bypass REG25 to V
SS
with 1FF and 10nF capacitors. Do not connect
other circuitry to this pin.
30 TACH0 Fan Tachometer Input
31 SDA I
2
C/SMBus-Compatible Input/Output
32 SCL I
2
C/SMBus-Compatible Clock Input
33 A0
SMBus Address 0 Input. This pin is sampled on device power-up to determine the SMBus address;
connect a 100kI resistor from this pin to either V
SS
or V
DD
to set the address.
34 FAULT
Active-Low, Open-Drain Fault Input/Output. If enabled with the MFR_FAULT_RESPONSE command, this
pin is asserted during a fault condition (fan speed, overtemperature, overvoltage, or undervoltage). Also,
if enabled with the MFR_FAULT_RESPONSE command, this pin is monitored and when it is asserted the
fans can be configured to be forced to 100% PWM duty cycle. This pin is used to provide hardware fault
control across multiple devices. This output is unconditionally deasserted when RST is asserted or the
device is power cycled. This pin has a 50Fs deglitch filter.
35 CONTROL
Global Fan-Off Control. When this pin is connected low, all fans are forced off (other functionality
remains active). When this pin is connected high (or left open circuit), fans operate normally. This pin
has a 50Fs deglitch filter and contains a weak pullup.
37
A1/
TACHSEL
SMBus Address 1 Input/Dual Tach-Select Output. This dual-function pin is sampled on device
power-up to determine the SMBus address; connect a 100kI resistor from this pin to either V
SS
or
V
DD
to set the address. After device power-up, this pin becomes an output that selects between two
tachometers in dual-fan applications.
38 ALERT Active-Low, Open-Drain Alert Output
39 RS-5 Ground Reference for Thermal Diode or Remote Voltage ADC5 Measurement
40 RS+5 Thermal Diode or Remote Voltage ADC Input, Measurement Relative to RS-5
— EP Exposed Pad (Bottom Side of Package). Connect EP to V
SS
.