Datasheet

MAX31725/MAX31726
±0.5°C Local Temperature Sensors
12Maxim Integrated
Configuration Register
The configuration register contains 8 bits of data and
initiates single conversions (ONE-SHOT), enables bus
timeout, controls shutdown, sets the fault queue, sets the
data format, selects OS polarity, and determines whether
the OS output functions in comparator or interrupt mode.
See Table 5.
Shutdown
Set bit D0 to 1 to place the device in shutdown mode
and reduce supply current to 3.5FA or less. If bit D0 is
set to 1 when a temperature conversion is taking place,
the device completes the conversion and then shuts
down. In interrupt mode, entering shutdown resets the
OS output. While in shutdown, the I
2
C interface remains
active and all registers remain accessible to the master.
Setting D0 to 0 takes the device out of shutdown and
starts a new conversion. The results of this conversion
are available to read after the max conversion time.
COMPARATOR/INTERRUPT Mode
Set bit D1, the COMPARATOR/INTERRUPT bit to 0 to
operate OS in comparator mode. In comparator mode,
OS is asserted when the temperature rises above the
T
OS
value. OS is deasserted when the temperature drops
below the T
HYST
value. See Figure 2.
Set bit D1 to 1 to operate OS in interrupt mode. In
interrupt mode, exceeding T
OS
also asserts OS. OS
remains asserted until a read operation is performed
on any of the registers. Once OS has asserted due to
crossing above T
OS
and is then reset, it is asserted again
only when the temperature drops below T
HYST
. The
output then remains asserted until it is reset by a read.
It is then asserted again if the temperature rises above
T
OS
, and so on. Putting the MAX31725 into shutdown
mode also resets OS. Note that if the mode is changed
while OS is active, an OS reset may be required before it
begins to behave normally.
OS Polarity
Set bit D2, the OS POLARITY bit, to 0 to force the OS
output polarity to active low. Set bit D2 to 1 to set the OS
output polarity to active high. OS is an open-drain output
under all conditions and requires a pullup resistor to
output a high voltage. See Figure 2.
Fault Queue
Bits D4 and D3, the fault queue bits, determine the
number of faults necessary to trigger an OS condition.
See Table 6. The number of faults set in the queue must
occur consecutively to trip the OS output. The fault queue
prevents OS false tripping in noisy environments.
Table 4. Temperature Data Output Format
Table 5. Configuration Register Definition
TEMPERATURE (°C)
NORMAL FORMAT EXTENDED FORMAT
BINARY Hex BINARY Hex
+150 0111 1111 1111 1111 7FFFh 0101 0110 0000 0000 5600h
+128 0111 1111 1111 1111 7FFFh 0100 0000 0000 0000 4000h
+127 0111 1111 0000 0000 7F00h 0011 1111 0000 0000 3F00h
+125 0111 1101 0000 0000 7D00h 0011 1101 0000 0000 3D00h
+64 0100 0000 0000 0000 4000h 0000 0000 0000 0000 0000h
+25 0001 1001 0000 0000 1900h 1101 1001 0000 0000 D900h
+0.5 0000 0000 1000 0000 0080h 1100 0000 1000 0000 C080h
0 0000 0000 0000 0000 0000h 1100 0000 0000 0000 C000h
-0.5 1111 1111 1000 0000 FF80h 1011 1111 1000 0000 BF80h
-25 1110 0111 0000 0000 E700h 1010 0111 0000 0000 A700h
-55 1100 1001 0000 0000 C900h 1000 1001 0000 0000 8900h
D7 D6 D5 D4 D3 D2 D1 D0
ONE-SHOT
TIMEOUT
DATA
FORMAT
FAULT
QUEUE [1]
FAULT
QUEUE [0]
OS
POLARITY
COMPARATOR/
INTERRUPT
SHUTDOWN