Datasheet

Dual Serial UART with 128-Word FIFOs
MAX3109
60 Maxim Integrated
Single-Byte Write
In this operation, the master sends an address and two
data bytes to the slave device (Figure 22). The following
procedure describes the single-byte write operation:
1) The master sends a START condition.
2) The master sends the 7-bit slave address plus a write
bit (low).
3) The addressed slave asserts an ACK on the data line.
4) The master sends the 8-bit register address.
5) The slave asserts an ACK on the data line only if the
address is valid (NACK if not).
6) The master sends 8 data bits.
7) The slave asserts an ACK on the data line.
8) The master generates a STOP condition.
Burst Write
In this operation, the master sends an address and mul-
tiple data bytes to the slave device (Figure 23). The slave
device automatically increments the register address
after each data byte is sent, unless the register being
accessed is 0x00, in which case the register address
remains the same. The following procedure describes
the burst write operation:
1) The master sends a START condition.
2) The master sends the 7-bit slave address plus a write
bit (low).
3) The addressed slave asserts an ACK on the data line.
4) The master sends the 8-bit register address.
5) The slave asserts an ACK on the data line only if the
address is valid (NACK if not).
6) The master sends 8 data bits.
7) The slave asserts an ACK on the data line.
8) Repeat 6 and 7 N-1 times.
9) The master generates a STOP condition.
Figure 22. Write Byte Sequence
Figure 23. Burst Write Sequence
S
P
DEVICE SLAVE ADDRESS - W A
8 DATA BITS
FROM MASTER TO STAVE
WRITE SINGLE BYTE
FROM SLAVE TO MASTER
A
REGISTER ADDRESS A
S DEVICE SLAVE ADDRESS - W A
8 DATA BITS - 1
BURST WRITE
A
REGISTER ADDRESS A
8 DATA BITS - N A
8 DATA BITS - 2 A
FROM MASTER TO STAVE FROM SLAVE TO MASTER
P