Datasheet

Dual Serial UART with 128-Word FIFOs
MAX3109
4 Maxim Integrated
Figure 1. I
2
C Timing Diagram.................................................................... 12
Figure 2. SPI Timing Diagram
................................................................... 12
Figure 3. Transmit FIFO Signals
.................................................................. 17
Figure 4. Receive Data Format
................................................................... 17
Figure 5. Receive FIFO
........................................................................ 18
Figure 6. Midbit Sampling
...................................................................... 18
Figure 7. Clock Selection Diagram
................................................................ 19
Figure 8. 2x and 4x Baud Rates
.................................................................. 20
Figure 9. GPIO_ Clock Pulse Generator
............................................................ 20
Figure 10. Auto Transceiver Direction Control
....................................................... 22
Figure 11. Setup and Hold Times in Auto Transceiver Direction Control
................................... 22
Figure 12. Single Transmitter Trigger Accuracy
...................................................... 23
Figure 13. Multiple Transmitter Synchronization Accuracy
.............................................. 23
Figure 14. Half-Duplex with Echo Suppression
...................................................... 24
Figure 15. Echo Suppression Timing
.............................................................. 25
Figure 16. Simplified Interrupt Structure
............................................................ 27
Figure 17. PLL Signal Path
...................................................................... 49
Figure 18. SPI Write Cycle
...................................................................... 57
Figure 19. SPI Ready Cycle
..................................................................... 57
Figure 20. SPI Fast Read Cycle
.................................................................. 58
Figure 21. I
2
C START, STOP, and Repeated START Conditions ......................................... 59
Figure 22. Write Byte Sequence
..................................................................60
Figure 23. Burst Write Sequence
.................................................................60
Figure 24. Read Byte Sequence
................................................................. 61
Figure 25. Burst Read Sequence
................................................................. 61
Figure 26. Acknowledge
....................................................................... 62
Figure 27. Startup and Initialization Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 28. Logic-Level Translation
................................................................63
Figure 29. Connector Sharing with a USB Transceiver
................................................ 64
Figure 30. RS-232 Application
...................................................................64
Figure 31. RS-485 Half-Duplex Application
......................................................... 65
LIST OF FIGURES