Datasheet

SPI/I
2
C UART with 128-Word FIFOs
MAX3107
4 Maxim Integrated
LIST OF FIGURES
Figure 1. I
2
C Timing Diagram.................................................................... 10
Figure 2. SPI Timing Diagram ................................................................... 10
Figure 3. Transmit FIFO Signals .................................................................. 15
Figure 4. Receive Data Format................................................................... 16
Figure 5. Midbit Sampling ...................................................................... 16
Figure 6. Receive FIFO ........................................................................ 17
Figure 7. Clock Selection Diagram ................................................................ 17
Figure 8. 2x and 4x Baud Rates.................................................................. 18
Figure 9. Auto Transceiver Direction Control ........................................................ 19
Figure 10. Setup and Hold Times in Auto Transceiver Direction Control................................... 20
Figure 11. Half-Duplex with Echo Suppression ...................................................... 20
Figure 12. Echo Suppression Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 13. Simplified Interrupt Structure............................................................ 23
Figure 14. PLL Signal Path ...................................................................... 41
Figure 15. SPI Single-Cycle Read ................................................................ 44
Figure 16. SPI Single-Cycle Write ................................................................44
Figure 17. I
2
C START, STOP, and Repeated START Conditions ......................................... 45
Figure 18. Write Byte Sequence.................................................................. 46
Figure 19. Burst Write Sequence ................................................................. 46
Figure 20. Read Byte Sequence ................................................................. 46
Figure 21. Burst Read Sequence ................................................................. 47
Figure 22. Acknowledge ....................................................................... 47
Figure 23. Startup and Initialization Flowchart ....................................................... 48
Figure 24. Logic-Level Translation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 25. Connector Sharing with a USB Transceiver ................................................ 49
Figure 26. RS-232 Application ................................................................... 50
Figure 27. RS-485 Half-Duplex Application ......................................................... 50
LIST OF TABLES
Table 1. StopBits Truth Table .................................................................... 33
Table 2. Length[1:0] Truth Table .................................................................. 33
Table 3. SwFlow[3:0] Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 4. PLLFactor[1:0] Selection Guide ........................................................... 41
Table 5. I
2
C Address Map ...................................................................... 45