Datasheet
SPI/I
2
C UART with 128-Word FIFOs
MAX3107
12 Maxim Integrated
Pin Configurations
Pin Descriptions
TQFN
(3.5mm × 3.5mm)
MAX3107
19
20
21
22
1 2 3 4 5 6
18 17 16 15 14 13
23
24
12
11
10
9
8
7
TX
XOUT
V
EXT
XIN
V
A
+
V
18
I2C/SPI
LDOEN
DOUT/SDA
SCLK/SCL
CS/A0
RX
GPIO3
GPIO2
GPIO1
AGND
*EP
*CONNECT EP TO AGND.
GPIO0
V
L
DGND
RST
DIN/A1
IRQ
CTS
TOP VIEW
24
23
22
21
20
19
17
1
2
3
4
5
6
8
XOUT
V
EXT
TX
RX
V
18
V
A
AGND
XIN
MAX3107
CTS
GPIO2
SCLK/SCL
LDOEN
18
7
GPIO3
DOUT/SDA
15
10
GPIO0
DIN/A1
16
9
GPIO1
CS/A0
13
12
V
L
RST
14
11
DGND
IRQ
I2C/SPI
SSOP
+
RTS/CLKOUT
RTS/CLKOUT
PIN
NAME FUNCTION
TQFN-EP SSOP
1 4 V
18
Internal 1.8V LDO Output and 1.8V Logic Supply Input. Bypass V
18
with a 1FF
ceramic capacitor to DGND. Keep V18 powered in shutdown mode.
2 5
I2C/SPI
SPI or Active-Low I
2
C Selector Input. Drive I2C/SPI high to enable SPI. Drive I2C/SPI
low to enable I
2
C.
3 6 LDOEN
LDO Enable Input. Drive LDOEN high to enable the internal 1.8V LDO. Drive LDOEN
low to disable the internal LDO. Power V18 with an external 1.8V supply when
LDOEN is low.
4 7 DOUT/SDA
Serial-Data Output. When I2C/SPI is high, DOUT/SDA functions as the DOUT SPI
serial-data output. When I2C/SPI is low, DOUT/SDA functions as the SDA I
2
C serial-
data input/output.
5 8 SCLK/SCL
Serial-Clock Input. When I2C/SPI is high, SCLK/SCL functions as the SCLK SPI serial-
clock input (up to 26MHz). When I2C/SPI is low, SCLK/SCL functions as the SCL I
2
C
serial-clock input (up to 400kHz).
6 9
CS/A0
Active-Low Chip-Select and Address 0 Input. When I2C/SPI is high, CS/A0 functions
as the CS SPI active-low chip select. When I2C/SPI is low, CS/A0 functions as the A0
I
2
C device address programming input. Connect CS/A0 to DGND or V
L
.