Datasheet

MAX3060E/MAX3061E/MAX3062E
±15kV ESD-Protected, Fail-Safe, 20Mbps, Slew-Rate-
Limited RS-485/RS-422 Transceivers in a SOT
R
R
A
B
V
OD2
V
OC
Figure 1. Driver DC Test Load
RECEIVER
OUTPUT
TEST POINT
1kΩ
1kΩ
S1
S2
V
CC
C
L
15pF
Figure 2. Receiver Enable/Disable Timing Test Load
DI
DE
5V
A
B
C
DIFF
R
DIFF
V
OD2
OUTPUT
UNDER TEST
500Ω
S1
S2
V
CC
C
L
Figure 3. Driver Timing Test Circuit Figure 4. Driver Enable/Disable Timing Test Load
DI
5V
0
B
A
V
O
0
-V
O
1.5V
t
DPLH
10%
t
DR
90%
90%
t
DPHL
1.5V
10%
t
DF
V
DIFF
= V (A) - V (B)
V
DIFF
t
DSKEW = |
t
DPLH
- t
DPHL |
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
5V
0
A, B
V
OL
A, B
0
1.5V 1.5V
V
OL
+ 0.5V
V
OH
- 0.5V
2.3V
2.3V
t
DZL(SHDN)
, t
DZL
t
DLZ
t
DZH(SHDN)
, t
DZH
t
DHZ
DE
Figure 5. Driver Propagation Delays Figure 6. Driver Enable and Disable Times
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