Datasheet

LIST OF FIGURES
Figure 1. SPI Timing Diagram ................................................................... 10
Figure 2. Initiating Readback .................................................................... 10
Figure 3. Reference Input .......................................................................11
Figure 4. Fast-Lock Loop Filter Topology 1 ......................................................... 13
Figure 5. Fast-Lock Loop Filter Topology 2 ......................................................... 13
LIST OF TABLES
Table 1. Typical Operating Characteristics Testing Conditions ........................................... 8
Table 2. Loop Filter Component................................................................... 8
Table 3. Fractional-N Digital Lock-Detect Settings ................................................... 12
Table 4. Integer-N Digital Lock-Detect Settings...................................................... 12
Table 5. Register 0 (Address: 000, Default: 383C0000 Hex) ........................................... 14
Table 6. Register 1 (Address: 001, Default: 00000001 Hex) ............................................ 15
Table 7. Register 2 (Address: 010, Default: 0000FFFA Hex) ............................................ 15
Table 8. Register 3 (Address: 011, Default: 00000043 Hex) ............................................ 16
Table 9. Register 4 (Address: 100, Default: 00000004 Hex)............................................ 18
Table 10. Register 6 (Read-Only Register) ......................................................... 18
MAX2880 250MHz to 12.4GHz, High-Performance,
Fractional/Integer-N PLL
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