Datasheet

MAX2831/MAX2832
2.4GHz to 2.5GHz 802.11g/b
RF Transceivers with Integrated PA
______________________________________________________________________________________ 19
B2
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37
36
35
34
33
32
31
30
29
28
27
26
25
V
CCLNA
B6
GNDRXLNA
RXRF+
RXRF-
B7
V
CCPA
TXRF+
TXRF-
SHDN
SERIAL
INTERFACE
TEMP
SENSOR
V
CCTXPA
B5
CS
RSSI
V
CCTXMX
SCLK
DIN
V
CCPLL
CLOCKOUT
LD
B1
CPOUT
RXBBQ+
RXBBQ-
RX Q
OUTPUTS
RX/TX GAIN
CONTROL
B4
BYPASS
TUNE
GNDVCO
CTUNE
V
CCVCO
XTAL
PLL
÷
GNDCP
SERIAL INPUTS
V
CCXTAL
V
CCCP
RXTX
GNDTEST
V
CCRXMX
TXBBI+
TXBBI-
TXBBQ+
TXBBQ-
V
CCRXFL
RXHP
V
CCRXVGA
RXBBI+
RXBBI-
MAX2832
MODE
CONTROL
RX/TX GAIN
CONTROL
RX/TX GAIN
CONTROL
REFERENCE
CLOCK BUFFER
OUTPUT
RX BASEBAND HPF
CORNER FREQUENCY
CONTROL
B3
RX/TX
GAIN CONTROL
RX INPUT
TX OUTPUT
MODE CONTROL
RX/TX GAIN
CONTROL
RX/TX GAIN
CONTROL
RX GAIN
CONTROL
TX INPUT RX I OUTPUTS
0°
90°
RSSI
MUX
TO RSSI
MUX
RSSI
TEMP
SENSOR
CRYSTAL
OSCILLATOR/
BUFFER
÷
RSSI
TO
RSSI
MUX
AM
DETECTOR
IMUX QMUX
NOTE: ALL GROUND (PINS 2, 26, AND 31) AND BYPASS CAPACITORS’ GROUND REQUIRE THEIR OWN VIAS TO GROUND.
DO NOT CONNECT THEM TO THE EXPOSED PADDLE GROUND.
MUX
MUX
Block Diagrams/Typical Operating Circuits (continued)