Datasheet
MAX260/MAX261/MAX262
Microprocessor Programmable
Universal Active Filters
______________________________________________________________________________________ 15
the digital lines should be buffered from the device by
logic gates as shown in Figure 6.
Shutdown Mode
The MAX260/MAX261/MAX262 enters a shutdown/
standby mode when all zeroes are written to the Q
addresses of filter A (Q0
A
–Q6
A
). When shut down,
power consumption with ±5V supplies typically drops
to 10mW. When reactivating the filter after shutdown,
allow 2ms to return to full operation.
Filter Operating Modes
There are several ways in which the summing amplifier
and integrators in each MAX260/MAX261/MAX262 filter
section can be configured. The four most versatile
interconnections (modes) are selected by writing to
inputs M0 and M1 (see Tables 4 and 5). These modes
use no external components. A fifth mode, 3A, makes
use of an additional op amp (included in the MAX261
and MAX262) and external resistors, but uses the same
internal configuration and is selected with the same
programming code, as mode 3.
FILTER B
CLK
OUT
12
CLK
B
f
CLK
=
0.45
RC
8
OSC
OUT
19(18)*
C
R
11
CLK
A
FILTER A
FILTER B
CLK
OUT CLK
B
OSC
OUT
CLK
A
FILTER A
12
8
19(18)*
11
CRYSTAL
*OSC OUT IS PIN 18 ON MAX261/MAX262
FILTER B
CLK
OUT
12
CLK
B
OSC
OUT
N.C.
11
CLK
A
FILTER A
N.C.
EXTERNAL CLOCK IN
(ANY DUTY CYCLE)
Figure 4. Clock Input Connections
DATA BIT ADDRESS
D0 D1 A3 A2 A1 A0
LOCATION
FILTER A
M0
A
M1
A
0000 0
F0
A
F1
A
0001 1
F2
A
F3
A
0010 2
F4
A
F5
A
0011 3
Q0
A
Q1
A
0100 4
Q2
A
Q3
A
0101 5
Q4
A
Q5
A
0110 6
Q6
A
0111 7
FILTER B
M0
B
M1
B
1000 8
F0
B
F1
B
1001 9
F2
B
F3
B
1010 10
F4
B
F5
B
1011 11
Q0
B
Q1
B
1100 12
Q2
B
Q3
B
1101 13
Q4
B
Q5
B
1110 14
Q6
B
1111 15
Table 4. Program Address Locations
Note: Writing 0 into Q0A–Q6A (address locations 4–7) on filter
A activates shutdown mode. BOTH filter sections deactivate.
D0, D1
WR
VALID DATA
t
DS
t
DH
t
WR
VALID ADDRESS
t
AS
A0–A3
SEE INTERFACE SPECIFICATIONS FOR TIMING LIMITS
t
AH
Figure 5. Interface Timing