Datasheet

���������������������������������������������������������������� Maxim Integrated Products 15
MAX2090
50MHz to 1000MHz Analog VGA and Power
Detector with Optional AGC Loop
value between 0 and 2.5V, such that the desired output
power is present at DET_IN (see the Typical Application
Circuit). As PLVLSET increases, the output power also
increases at a typical rate of 17.6dB/V. The detector
consists of a linear-in-dB VGA followed by an X
2
detec-
tor circuit that produces mean-square DC output on the
FLTR pin. An error amplifier compares the detector’s
output voltage to PLVLSET and drives the attenuator in
servo fashion until the error amplifier’s differential input
error voltage is near zero. The servo loop acts to maintain
the input power level to the detector as the power level
at RF_IN changes.
Open-ALC Mode Operation
Open-ALC mode operation consists of setting CTRL1 =
logic 0 and CTRL2 = logic 1, and applying a DC value
to PLVLSET between 0 and 2.5V DC to manually adjust
the attenuator and subsequently the DET_IN power to
any desired value. The output power increases at a
typical rate of 19.5dB/V as PLVLSET is increased. The
power detector remains powered on in this mode, and
the detector output voltage is available on DET_VOUT.
DET_VOUT has a typical output resistance of 235kI. In
open-ALC mode, components R5, C8, and C9 can be
left unpopulated.
Alarm Operation
During closed-loop operation and for low power levels at
RF_IN, the input attenuator reaches minimum attenuation
and the power level at the input of the detector falls below
the desired value. ALM_THRES has 135kI resistance
and is set internally to 1.35V (typ) such that ALM triggers
when RF_IN power drops below -30dBm. Alternatively,
the voltage on ALM_THRES can be externally driven to
allow alternative power-level trip points. The power level
at which ALM trips varies at a typical rate of 17.6dB/V of
ALM_THRES. The ALM comparator has typical hysteresis
of 0.5dB.
Layout Considerations
The pin configuration of the MAX2090 is optimized to
facilitate a very compact physical layout of the device
and its associated discrete components. The exposed
pad (EP) of the device’s 20-pin TQFN-EP package
provides a low thermal-resistance path to the die. It is
important that the PCB on which the device is mounted
be designed to conduct heat from the EP. In addition,
provide the EP with a low inductance path to electrical
ground. The EP MUST be soldered to a ground plane
on the PCB, either directly or through an array of plated
via holes.
Table 2. Alarm Polarity
Table 3. Typical Application Circuit Component Values
RF�IN POWER ALM
RF_IN power > alarm threshold 1
RF_IN power < alarm threshold (low-power fault condition) 0
COMPONENT
MODE OF OPERATION
VALUE SIZE SUPPLIER DESCRIPTION
VGA
ONLY
CLOSED
ALC
OPEN
ALC
C1, C5 √ √ √ 1000pF 0402 Murata C0G dielectric
C4 Do not install 0402 — —
C2, C3 √ √ √
0.01FF
0402 Murata X7R dielectric
C6 √ √ 68nF 0603 Murata X7R dielectric
C7 √ √ 1000pF 0402 Murata C0G dielectric
C8 √ 100nF 0603 Murata X7R dielectric
C9 √ 820pF 0402 Murata C0G dielectric
C14* Do not install 0402 — —