Datasheet

MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
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VCC_ANALOG
38
GND
13
GND
15
36
GND
GND ATTEN_IN
14
37
GND GND
16
35
TQFN
EXPOSED PAD ON BOTTOM.
CONNECT EP TO GND.
GND
17
34
GND
33
RSET
AMP_OUT
18
ATTEN_OUT
32
GND
19
AMP_IN GND
20
31
GND ANALOG_VCTRL
12
39
GND VREF_IN
11
40
238
GND GND
6
CS GND
25
247
VDD_LOGIC GND
5
CLK GND
26
4
DATA
GND
27
3
GNDVDAC_EN
28
2
GNDVREF_SELECT
29
229
GND GND
2110
GND VCC_AMP
1
TOP VIEW
30
GND
GND
+
ANALOG ATTENUATOR
VREF
DAC
DRIVER AMP
SPI INTERFACE
MAX2067
Pin Configuration/Functional Block Diagram
Chip Information
PROCESS: SiGe BiCMOS
Package Information
For the latest package outline information, go to
www.maxim-ic.com/packages
.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
40 Thin QFN-EP T4066-3
21-0141