Datasheet

MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
22 ______________________________________________________________________________________
Output Capacitor
The output capacitor affects the circuit’s stability and
output-voltage ripple. A 15µF ceramic capacitor works
well in most 1.5MHz applications. Depending on the
output capacitor chosen, feedback compensation may
be required or desirable to increase the loop phase
margin or increase the loop bandwidth for transient
response. (See the Feedback Compensation section.)
The total output-voltage ripple has three components:
the inductive ripple caused by the capacitor’s equivalent
series inductance (ESL), the ohmic ripple due to the
capacitor’s equivalent series resistance (ESR), and the
capacitive ripple caused by the charging and discharg-
ing of the output capacitance. Since the ESL is usually
very small, the inductive ripple can be neglected:
where I
PEAK
is the peak inductor current. (See the
Inductor Selection section.) For ceramic capacitors, the
output voltage ripple is typically dominated by V
RIP-
PLE(C)
. The voltage rating and temperature characteris-
tics of the output capacitor must also be considered.
Feedback Compensation
Feedback compensation is not needed for the excellent
stability and fast transient response of Figure 1’s circuit.
However, lead or lag compensation can be useful to
compensate for layout issues, or optimize the transient
response for various output capacitor or inductor values.
The loop stability of a current-mode step-up regulator can
be analyzed by using a small-signal model. In continuous
conduction mode, the loop gain transfer function consists
of a DC loop gain, a dominant pole, a right-half-plane
(RHP) zero, and an ESR zero. In the case of ceramic out-
put capacitors, the ESR zero is at very high frequency
and can be ignored. For stable operation, place the domi-
nant pole at a low enough frequency to ensure that the
loop gain reaches unity well before the RHP zero, prefer-
ably below one-third of the RHP zero frequency f
Z_RHP
.
The frequency of the dominant pole is:
where R
L
is the load resistance and C is the output
capacitance; the frequency of the RHP zero is:
where D is the duty cycle and L is the inductance; and
the DC gain is given by:
where R
CS
is the 20mΩ internal equivalent current-
sense resistor, and R7 and R8 are the feedback divider
resistors in Figure 9.
Adding lead compensation (an RC network from V
MAIN
to
FB) increases the loop bandwidth, which can increase
the speed of response to transients. Too much speed
can destabilize the loop and is not needed or recom-
mended for Figure 1’s components.
Lead compensation adds a zero-pole pair, providing
gain at higher frequencies and increasing loop band-
width. The frequencies of the zero and pole for lead
compensation depend on the feedback divider resistors
and the RC network between V
MAIN
and FB (Figure 9).
A2
R
DC
CS
L
=×
+
×
−
×






0
8
78
1
log
()R
RR
D
R
f
Z_RHP
L
= −( ) 1
2
2
D
R
Lπ
f
1
P_DOMINANT
L
=
2πRC
VV V
VIRa
V
I
C
V-V
Vf
RIPPLE RIPPLE(ESR) RIPPLE(C)
RIPPLE(ESR) PEAK ESR(COUT)
RIPPLE(C)
MAIN
OUT
MAIN IN
MAIN OSC
=+
≈
≈






,nd
Figure 9. External Compensation
V
MAIN
V
IN
R10
R8
R9
R
L
C9
LX
FB
GND
PGND
D1
C10
C
R7
D
L
MAX1997
MAX1998