Datasheet

MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
18 ______________________________________________________________________________________
Linear-Regulator Controller REG 2
(MAX1997 Only)
The linear-regulator controller REG 2 is an analog gain
block with an open-drain N-channel output. It drives an
external PNP pass transistor with a 2.2kΩ base-to-emitter
resistor (Figure 1). Its guaranteed base drive sink current
is at least 5mA. The regulator is designed to deliver
30mA with an output capacitor of 2.2µF.
REG 2 is enabled when SHDN is high, the gate to the
input P-channel MOSFET is low, ONDC is high, and
V
CT
> V
ON2
. (See the Power-Up Sequencing and
Inrush Current Control section.) Each time it is enabled,
the regulator goes through a soft-start routine that
ramps up its reference input. REG 2 is typically used to
provide the TFT LCD gamma reference voltage.
VCOM Buffer (MAX1997 Only)
The MAX1997 includes a VCOM buffer, which is an oper-
ational transconductance amplifier that provides a current
output for driving the backplane of a TFT LCD panel. The
unity-gain bandwidth of this current-output buffer is:
GBW = g
m
/C
OUT
where g
m
is the amplifier’s transconductance, which is
the ratio of the output current to the input voltage. The
VCOM buffer requires only a 0.47µF ceramic output
capacitor for stability. The bandwidth is inversely pro-
portional to the output capacitance. Thus, large capaci-
tive loads reduce the bandwidth of the buffer output.
In order to improve the transient response time, the ampli-
fier has nonlinear transconductance. The amplifier senses
the output current and increases the transconductance
as the output current increases. The effect is to provide
additional output current when the load demands it.
Undervoltage Lockout (UVLO)
To ensure that the input voltage is high enough for reli-
able operation, the MAX1997/MAX1998 include an
undervoltage lockout (UVLO) circuit. The UVLO thresh-
old at the IN pin is 2.7V (typ) rising and 2.35V (typ)
falling. The 350mV (typ) hysteresis prevents supply tran-
sients from causing a restart. Once the input voltage
exceeds the UVLO rising threshold, the controller
enables the reference block. Once the reference is
above 1.05V, an internal 10µA current source pulls the
GATE pin low and turns on an external P-channel
MOSFET switch (P1, Figure 1) that connects the input
supply to the regulator. When the input voltage falls below
the UVLO falling threshold, the controller turns off the ref-
erence and all the regulator outputs, and pulls GATE high
with an internal 100Ω switch to turn off P1 (Figure 6).
Reference Voltage (REF)
The reference output is nominally 1.25V, and can
source up to 75µA. (See the Typical Operating
Characteristics.) Bypass REF with a 0.22µF ceramic
capacitor connected between REF and GND.
Oscillator Frequency Control (FREQ)
The internal oscillator frequency is adjustable using the
three-level FREQ input. Connect FREQ to ground for
375kHz operation, connect FREQ to V
IN
for 1.5MHz
operation, and leave FREQ unconnected for 750kHz
operation. When FREQ is left unconnected, bypass
FREQ to ground with a 1000pF to 0.1µF capacitor to
prevent switching noise from coupling into the pin’s
high input impedance. Note that the soft-start period
scales with the oscillator frequency. (See the Soft-Start
section.) The fault timer period does not scale with the
oscillator frequency.
Figure 6. External P-Channel MOSFET Input Switch Control
V
REF
2
IN
GATE
V
IN
INPUT
CAP
EXTERNAL
PFET
INDUCTOR
INPUT
CAP
10µA
GATE
ENABLE