Datasheet

MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
16 ______________________________________________________________________________________
In addition, all outputs are monitored for fault conditions
that last longer than the fault timer period. The device
goes into a latched shutdown state, if the junction tem-
perature of the device exceeds +160°C.
Main Step-Up Controller
The main step-up regulator switches at up to 1.5MHz,
and employs a current-mode control architecture to
maximize loop bandwidth and provide fast transient
response to pulsed loads found in source drivers for
TFT LCD panels. In addition, the high switching fre-
quency allows the use of low-profile inductors and
ceramic capacitors to minimize the thickness of LCD
panel designs. The integrated high-efficiency MOSFET
reduces the number of external components. The IC’s
built-in soft-start function controls the inrush current.
Depending on the input-to-output voltage ratio, the reg-
ulator controls the output voltage and the power deliv-
ered to the output by modulating the duty cycle (D) of
the power MOSFET in each switching cycle.
The duty cycle of the MOSFET is approximated by:
On the rising edge of the internal clock, the controller sets
a flip-flop, which turns on the N-channel MOSFET (Figure
3). The input voltage is applied across the inductor. The
inductor current ramps up linearly, storing energy in a
magnetic field. Once the sum of the feedback voltage,
slope-compensation, and current-feedback signals trip
the multi-input PWM comparator, the MOSFET turns off,
and the flip-flop resets. Since the inductor current is con-
tinuous, a transverse potential develops across the induc-
tor that turns on the diode (D1). The voltage across the
inductor becomes the difference between the output volt-
age and the input voltage. This discharge condition
forces the current through the inductor to ramp back
down, transferring the energy stored in the magnetic field
to the output capacitor and the load. The MOSFET
remains off for the rest of the clock cycle.
D
V-V
MAIN IN
MAIN
≈
V
Figure 3. Main Step-Up Converter Functional Diagram
TO FAULT
LOGIC
1.0V
R
S
Q
REFOUT REFIN
CLK
∑
LX
PGND
SOFT-START
RESET DOMINANT
ILIM COMPARATOR
FROM
OSCILLATOR
CURRENT
SENSE
SLOPE_COMP
V
LIMIT
FB
REF