Datasheet

For most designs, a reasonable inductor value (L
INIT
) is
derived from the following equation:
Keep the inductor current ripple percentage LIR
between 20% and 40% of the maximum load current for
best compromise of cost, size, and performance. The
maximum inductor current is:
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor must meet the ripple current
requirement (I
RMS
) imposed by the switching currents
defined by the following equation:
A ceramic capacitor is recommended due to its low
equivalent series resistance (ESR), equivalent series
inductance (ESL), and lower cost. Choose a capacitor
that exhibits less than a 10°C temperature rise at the
maximum operating RMS current for optimum long-term
reliability.
Output Capacitor
The key selection parameters for the output capacitor
are its capacitance, ESR, ESL, and the voltage rating
requirements. These affect the overall stability, output
ripple voltage, and transient response of the DC-DC
converter.
The output ripple is due to variations in the charge
stored in the output capacitor, the voltage drop due to
the capacitor’s ESR, and the voltage drop due to the
capacitor’s ESL.
The output voltage ripple due to the output capaci-
tance, ESR, and ESL is:
V
RIPPLE (ESL)
= (I
P-P
/T
ON
)

ESL or (I
P-P
/T
OFF
)

ESL,
whichever is greater.
I
P-P
is the peak-to-peak inductor current:
These equations are suitable for initial capacitor selec-
tion, but final values should be set by testing a proto-
type or evaluation circuit. As a rule, a smaller ripple
current results in less output voltage ripple. Since the
inductor ripple current is a factor of the inductor value,
the output voltage ripple decreases with larger induc-
tance. Ceramic capacitors are recommended due to
their low ESR and ESL at the switching frequency of the
converter. For ceramic capacitors, the ripple voltage
due to ESL is negligible.
Load transient response depends on the selected out-
put capacitor. During a load transient, the output
instantly changes by ESR

∆I
LOAD
. Before the con-
I
VV
fL
V
V
PP
IN OUT
SW
OUT
IN
−
=
×
×
−
V I ESR
RIPPLE ESR P P()
=×
−
V
I
Cf
RIPPLE C
PP
OUT SW
()
=
××
−
8
VV V V
RIPPLE RIPPLE C RIPPLE ESR RIPPLE ESL
=+ +
() ( ) ( )
I
V
IVVV
IV
RMS
IN
OUT
OUT IN OUT
OUT
OU
=
×
()
+
×
−
1
1
11
2
2
2
TTINOUT
VV
22
−
()
I
LIR
I
L MAX OUT MAX() ()
=+
⎡
⎣
⎢
⎤
⎦
⎥
1
2
L
VVV
VLIRI f
INIT
OUT IN OUT
IN OUT MAX OSC
=
()
×× ×
−
()
MAX1970/MAX1971/MAX1972
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
______________________________________________________________________________________ 17
Table 1. Output Voltage Settings
FBSEL1 OUTPUT 1 FBSEL2 OUTPUT 2
V
CC
3.3V V
CC
2.5V
GND 1.8V GND 1.5V
Open Ext Divider Open Ext Divider
Table 2. Suggested Inductors
MANUFACTURER PART
INDUCTANCE
(µH)
ESR
(mΩ)
SATURATION
CURRENT (A)
DIMENSIONS (mm)
Coilcraft DO1606 4.7 120 1.2 5.3
✕
5.3
✕
2
Sumida CR43-4R7 4.7 108.7 1.15 4.5
✕
4
✕
3.5
Sumida CDRH3D16-4R7 4.7 80 0.9 3.8
✕
3.8
✕
0.8