Datasheet

MAX19706
10-Bit, 22Msps, Ultra-Low-Power
Analog Front-End
24 ______________________________________________________________________________________
Shutdown mode offers the most dramatic power sav-
ings by shutting down all the analog sections of the
MAX19706 and placing the Rx ADC digital outputs in
tri-state mode. When the Rx ADC outputs transition
from tri-state to ON, the last converted word is placed
on the digital outputs. The Tx DAC previously stored
data is lost when coming out of shutdown mode. The
wake-up time from shutdown mode is dominated by the
time required to charge the capacitors at REFP, REFN,
and COM. In internal reference mode and buffered
external reference mode, the wake-up time is typically
82.2µs to enter Rx mode and 26.4µs to enter Tx mode.
In idle mode, the reference and clock distribution cir-
cuits are powered, but all other functions are off. The
Rx ADC outputs are forced to tri-state. The wake-up
time is 9.6µs to enter Rx mode and 6.0µs to enter Tx
mode. When the Rx ADC outputs transition from tri-
state to ON, the last converted word is placed on the
digital outputs.
In standby mode, the reference is powered, but the rest
of the device functions are off. The wake-up time from
standby mode is 17.5µs to enter Rx mode and 22µs to
enter Tx mode. When the Rx ADC outputs transition from
tri-state to active, the last converted word is placed on
the digital outputs.
FAST and SLOW Rx and Tx Modes
In addition to the external Tx-Rx control, the MAX19706
also features SLOW and FAST modes for switching
between Rx and Tx operation. In FAST Tx mode, the Rx
ADC core is powered on but the ADC core digital out-
puts are tri-stated on the D0–D9 bus; likewise, in FAST
Rx mode, the transmit DAC core is powered on but the
DAC core digital inputs are tri-stated on the D0–D9 bus.
The switching time between Tx to Rx or Rx to Tx is FAST
because the converters are on and do not have to
recover from a power-down state. In FAST mode, the
switching time between Rx to Tx and Tx to Rx is 0.5µs.
Power consumption is higher in FAST mode because
both the Tx and Rx cores are always on. To prevent
Table 9. Offset Control Bits for I and Q Channels (IOFFSET or QOFFSET Mode)
BITS IO5–IO0 WHEN IN IOFFSET MODE, BITS QO5–QO0 WHEN IN QOFFSET MODE
IO5/QO5 IO4/QO4 IO3/QO3 IO2/QO2 IO1/QO1 IO0/QO0
OFFSET 1 LSB =
(VFS
P-P
/ 1023)
1 1 1 1 1 1 -31 LSB
1 1 1 1 1 0 -30 LSB
1 1 1 1 0 1 -29 LSB
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
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100010-2 LSB
100001-1 LSB
1000000mV
0 0 0 0 0 0 0mV (Default)
0000011 LSB
0000102 LSB
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
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01110129 LSB
01111030 LSB
01111131 LSB
Note: For transmit full scale of ±400mV: 1 LSB = (800mV
P-P
/ 1023) = 0.7820mV.
Table 10. Common-Mode Select
(COMSEL Mode)
CM1 CM0 Tx DAC OUTPUT COMMON MODE (V)
0 0 1.35 (Default)
0 1 1.20
1 0 1.05
1 1 0.90