Datasheet

Input Capacitance
MAX196/MAX198
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V ±5%; unipolar/bipolar range; external reference mode, V
REF
= 4.096V; 4.7µF at REF pin; external clock, f
CLK
= 2.0MHz
with 50% duty cycle; T
A
= T
MIN
to T
MAX
; unless otherwise noted. Typical values are at T
A
= +25°C.)
V2.4 4.18Input Voltage Range
µA
400
Input Current
V
REF
=
4.18V
1
VV
DD
- 50mV
REFADJ Threshold for
Buffer Disable
Normal, or STANDBY power-down mode kΩ10
Input Resistance
FULL power-down mode 5 MΩ
Normal, or STANDBY
power-down mode
FULL power-down mode
Internal acquisition
3.0 5.0
External reference = 4.096V
After FULLPD or STBYPD
External acquisition (Note 9)
CONDITIONS
FULL power-down mode (Note 7)
5
µs
3.0
t
ACQI
Acquisition Time
LSB
±0.1 ±
1
/
2
PSRR
Power-Supply Rejection Ratio
(Note 8)
3.0
t
ACQE
External CLK
µs
V4.75 5.25V
DD
Supply Voltage
6.0
t
CONV
Conversion Time
Internal CLK, C
CLK
= 100pF 6.0 7.7 10.0
To 0.1mV REF bypass
capacitor fully discharged
ms
8
Reference Buffer Settling
60 120
60
Normal mode, bipolar ranges
700 850
Normal mode, unipolar ranges
UNITSMIN TYP MAXSYMBOLPARAMETER
STANDBY power-down mode
mA
18
I
DD
Supply Current
610
µA
Internal reference ±
1
/
2
C
CLK
= 100pF MHz1.25 1.56 2.00f
CLK
Internal Clock Frequency
0.1 2.0f
CLK
External Clock Frequency Range MHz
External CLK
Internal CLK
Power-up (Note 10) µs200
Bandgap Reference
Start-Up Time
External CLK
ksps
100
Throughput Rate
Internal CLK, C
CLK
= 100pF 62
C
REF
= 4.7µF
C
REF
= 33µF
C
IN
15 pF(Note 5)
Input Leakage Current I
IN
±10 µAV
IN
= 0V or V
DD
Input Low Voltage V
INL
0.8 V
Input High Voltage V
INH
2.4 V
POWER REQUIREMENTS
TIMING
REFERENCE INPUT (buffer disabled, reference input applied to REF pin)
DIGITAL INPUTS (D7–D0, CLK, RD, WR, CS) (Note 11)