Datasheet

MAX1917
Tracking, Sinking and Sourcing, Synchronous Buck
Controller for DDR Memory and Termination Supplies
14 ______________________________________________________________________________________
POK
V+
DDR
EN/HSD
REF
GND
ILIM
VTT
VTTR
PGND
VL
BST
DH
LX
DL
FSEL
4.5V TO 15V
C2
4 x 330µF
6V
C1
1µF
25V
C8
0.47µF/10V
PGND
C3
4.7µF
10V
C4
0.47µF
10V
C9
0.22µF
25V
2.5V
2.5V AT 12A
L1
0.75µH/24A
Q2
IRF7822
Q1
IRF7822
D1
CMPSH-3
Q3
2N7002K
R3
20kΩ
R2
5.1kΩ
R4
15kΩ
0.1%
R5
10kΩ
0.1%
5V
POK
VL
OUTPUT CAPACITORS ARE SELECTED TO COMPLY WITH JEDEC SPECIFICATIONS
C6
3 x 560µF
4V
C5
1µF
6.3V
V
OUT
V
IN
R6
MAX1917
SHDN
3
10
2
1
7
5
6
8
11
14
15
16
12
13
4
9
Figure 7. Circuit to Generate a Fixed 2.5V at 12A Output with a Wide Input Voltage Range
POK
V+
DDR
EN/HSD
REF
GND
ILIM
VTT
VTTR
PGND
VL
BST
DH
LX
DL
FSEL
2.5V
C2
330µF
6V
C1
1µF
6.3V
C8
0.47µF/10V
V+
V
DDR
PGND
C3
2.2µF
10V
C4
0.22µF
10V
C7
1µF/10V
C9
0.47µF/25V
2.5V
5.5V TO 14V
1.25V AT 3.5A
L1
1.0µH/5A
Q2
IRF7811W
Q1
IRF7811W
D1
CMPSH-3
Q3
Si1029X
R3
20kΩ`
R2
10kΩ
VL
VL
SHDN
POK
VL
OUTPUT CAPACITORS ARE SELECTED TO COMPLY WITH JEDEC SPECIFICATIONS.
C6
3 x 270µF
2V
C5
10µF
6.3V
V
OUT
V
IN
VTTR
MAX1917
3
10
2
1
7
5
6
8
11
14
15
16
12
13
4
9
Figure 6. Typical Application Circuit Using P/N-Channel MOSFETs for EN to Minimize the Supply Current from V
IN
in Shutdown Mode
Typical Application Circuits (continued)