Datasheet

MAX1762/MAX1791
High-Efficiency, 10-Pin µMAX, Step-Down
Controllers for Notebooks
______________________________________________________________________________________ 17
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum battery volt-
age is applied, due to the squared term in the CV
2
f
switching loss equation. If the high-side MOSFET cho-
sen for adequate R
DS(ON)
at low battery voltages
becomes extraordinarily hot when subjected to
V
VP(MAX)
, reconsider your choice of high-side MOS-
FET.
Calculating the power dissipation in Q1 due to switch-
ing losses is difficult since it must allow for difficult
quantifying factors that influence the turn-on and turn-
off times. These factors include the internal gate resis-
tance, gate charge, threshold voltage, source induc-
tance, and PC board layout characteristics. The follow-
ing switching loss calculation provides only a very
rough estimate and is no substitute for breadboard
evaluation, preferably including a verification using a
thermocouple mounted on Q1:
where C
RSS
is the reverse transfer capacitance of Q1,
and I
GATE
is the peak gate-drive source/sink current.
For the low-side MOSFET, the worst-case power dissi-
pation always occurs at maximum battery voltage:
The absolute worst case for MOSFET power dissipation
occurs under heavy overloads that are greater than
I
LOAD(MAX)
but are not quite high enough to exceed
the current limit and cause the fault latch to trip. To pro-
tect against this possibility, the circuit must be overde-
signed to tolerate:
I
LOAD
= I
LIMIT(HIGH)
+ (LIR / 2 )
✕
I
LOAD(MAX)
where I
LIMIT(HIGH)
is the maximum valley current
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. This means that
the MOSFET must be very well heatsinked. If short-cir-
cuit protection without overload protection is enough, a
normal I
LOAD
value can be used for calculating compo-
nent stresses.
During the period when the high-side switch is off, cur-
rent circulates from ground to the junction of both FETs
and the inductor. As a consequence, the polarity of the
switching node is negative with respect to ground. If
unchanged, this voltage is approximately 0.7V (a diode
drop) at both transition edges while both switches are
off. In between the edges, the low-side switch con-
ducts; the drop is I
L
✕
R
DS(ON)
. If a Schottky clamp is
connected across the low-side switch, the initial and
final voltage drops is reduced, improving efficiency
slightly.
Choose a Schottky diode (D1) having a forward voltage
low enough to prevent the Q2 MOSFET body diode
from turning on during the dead time. As a general rule,
a diode having a DC current rating equal to 1/3 of the
load current is sufficient. This diode is optional and can
be removed if efficiency isn’t critical.
Applications Issues
Dropout Performance
The output voltage adjust range for continuous-conduc-
tion operation is restricted by the nonadjustable 500ns
(max) minimum off-time one-shot. When working with
low input voltages, the duty-factor limit must be calcu-
lated using worst-case values for on- and off-times.
Manufacturing tolerances and internal propagation
delays introduce an error to the t
ON
K-factor. Also,
keep in mind that transient response performance of
buck regulators operating close to dropout is poor, and
bulk output capacitance must often be added.
Dropout design example: V
IN
= 7V (min), V
OUT
= 5V, f
= 300kHz. The required duty cycle is :
The worst-case on-time is:
The maximum IC duty factor based on timing con-
straints of the MAX1762/MAX1792 is:
which meets the required duty cycle. Remember to
include inductor resistance and MOSFET on-state volt-
age drops (V
SW
) when doing worst-case dropout duty-
factor calculations.
Fixed Output Voltages
The MAX1762/MAX1791 Dual Mode operation allows
the selection of common voltages without requiring
external components (Figure 9). Connect FB to GND for
Duty
t
t+t
ON(MIN)
ON(MIN) OFF(MAX)
==
+
=
218
218 05
082
.
..
.,
µ
µµ
s
ss
t
V+0.075
V
5V+ 0.075
7V
ON(MIN)
OUT
VP
=×=×
×=
K
ss335 90 218.%.µµ
DC
V+V
V-V
5V+ 0.1V
7V - 0.1V
REQ
OUT SW
VP SW
===074.
PD(Q2) -
V
V
IR
OUT
VP(MAX)
LOAD DS
2
=








××1
PD (Q1 switching)
CV I
I
RSS VP(MAX) LOAD
GATE
2
=
×׃×







