Datasheet

MAX1778/MAX1880–MAX1885
Quad-Output TFT LCD DC/DC
Converters with Buffer
31
Maxim Integrated
Input-to-Output (Dropout) Voltage and Startup
A linear regulator’s minimum input-to-output voltage dif-
ferential (dropout voltage) determines the lowest use-
able supply voltage. Because the MAX1778/
MAX1881/MAX1883/MAX1884 use an internal pnp tran-
sistor (or external npn transistor), their dropout voltage
is a function of the transistor’s collector-to-emitter satu-
ration voltage (see the Typical Operating
Characteristics ). The linear regulator’s quiescent cur-
rent increases when in dropout.
The internal linear regulator tries to start up once its
supply voltage (V
SUPL
) exceeds 4V. When the linear
regulator powers up, the linear regulator may be in
dropout if the linear regulator’s output set voltage is
higher than its input supply voltage. Therefore, during
this brief period, the linear regulator draws additional
supply current until the input supply voltage exceeds
the output set voltage plus the pass transistor’s satura-
tion voltage (V
LDO(SET
) + V
CE(SAT)
).
VCOM Buffer (Operational
Transconductance Amplifier)
Buffer Output Voltage and Capacitor Selection
The positive input (BUF+) features dual-mode opera-
tion. Connect BUF+ to GND for the preset V
SUPB
/2 out-
put voltage, set by an internal 50% resistive-divider.
Adjust the amplifier’s output voltage by connecting a
voltage-divider from SUPB to BUF+ to GND (Figure 6).
Select R12 in the 10kΩ to 100kΩ range. Calculate R11
with the following equation:
where V
SUPB
can range from 4.5V to 13V, and V
BUF+
can range from 1.2V to (V
SUPB
- 1.2V). Connect a mini-
mum 1µF ceramic capacitor from BUFOUT to ground.
PCB Layout and Grounding
Careful PCB layout is extremely important for proper
operation. Follow the following guidelines for good PCB
layout:
1) Place the main step-up converter output diode and
output capacitor less than 0.2in (5mm) from the LX
and PGND pins with wide traces and no vias.
2) Separate analog ground and power ground. The
ground connections for the step-up converter’s and
charge pump’s input and output capacitors should
be connected to the power ground plane. The lin-
ear regulator’s and VCOM buffer’s input and output
capacitors should be connected to a separate
power-ground path, star-connected to the PGND
pin to minimize voltage drops. When using multi-
RR
V
V
SUPB
BUF
11 12 1 =
⎛
⎝
⎜
⎞
⎠
⎟
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥
+
-
IN
SHDN
LDOOUT
LX
L1
6.8µH
INPUT
V
IN
= 3.3V
C1
0.22µF
C
OUT
(2) 4.7µF
C
IN
4.7µF
R1
274kΩ
R2
49.9kΩ
FB
GND
FBL
REF
Q1
INTG
PGND
C
REF
0.22µF
MAX1778
MAX1883
(MAX1881)*
(MAX1884)*
R3
49.9kΩ
R4
49.9kΩ
C
LDO
1µF
C3
0.01µF
C2
0.01µF
C
LDOOUT
4.7µF
C
LDOIN
1µF
R5
1.5kΩ
MAIN
V
MAIN
= 8V
LDO
V
LDO
= 2.5V
SUPL
Figure 7. External Linear Regulator