Datasheet

MAX17502 60V, 1A, Ultra-Small, High-Efciency,
Synchronous Step-Down DC-DC Converter
www.maximintegrated.com
Maxim Integrated │ 14
Power Dissipation
The exposed pad of the IC should be properly soldered to
thePCBtoensuregoodthermalcontact.Ensurethejunction
temperature of the device does not exceed +125°C under
the operating conditions specified for the power supply.
At high ambient temperatures, based on the operating con-
dition, the heat dissipated in the IC might exceed the maxi-
mumjunctiontemperatureof+125°C.Heatsinkshouldbe
usedtoreduceθ
JA
at such operating conditions. For typi-
cal applications, refer to the temperature derating curves
included in the MAX17502 Evaluation Kit data sheet.
To prevent the part from exceeding 125°C junction tem-
perature, users need to do some thermal analysis. At a
particular operating condition, the power losses that lead
to temperature rise of the device are estimated as follows:
(
)
2
LOSS OUT DCR
OUT
1
P (P ( - 1)) - I R
=××
η
OUT OUT OUT
P VI= ×
where P
OUT
istheoutputpower,ηisistheefficiencyof
thedevice,andR
DCR
is the DC resistance of the output
inductor (refer to the Typical Operating Characteristics
in the evaluation kit data sheets for more information on
efficiency at typical operating conditions).
The maximum power that can be dissipated in the 10-pin
TDFN-EP package is 1188.7mW at +70°C temperature.
The power dissipation capability should be derated as
the temperature goes above +70°C at 14.9mW/°C. For a
typical multilayer board, the thermal performance metrics
for the package are given as:
JA
67.3 C Wθ= °
JC
18.2 C Wθ= °
The maximum power that can be dissipated in the 14-pin
TSSOP-EP package is 2051.3mW at +70ºC temperature.
The power dissipation capability should be derated, as
the temperature goes above +70ºC at 25.6mW/ºC. For a
typical multilayer board, the thermal performance metrics
for the package are given as:
JA
39 C Wθ=°
JC
3CWθ=°
The junction temperature of the device can be estimated
at any given maximum ambient temperature (T
A_MAX
)
from the following equation:
( )
J_MAX A_MAX JA LOSS
TT P= +θ ×
If the application has a thermal-management system that
ensures that the exposed pad of the device is maintained
at a given temperature (T
EP_MAX
) by using proper heat
sinks, then the junction temperature of the device can be
estimated at any given maximum ambient temperature as:
( )
J_MAX EP_MAX JC LOSS
TT P= +θ ×
PCB Layout Guidelines
CarefulPCBlayoutiscriticaltoachievelowswitchingloss-
es and stable operation. For a sample layout that ensures
first-pass success, refer to the MAX17502 evaluation kit
layouts available at www.maximintegrated.com. Follow
theseguidelinesforgoodPCBlayout:
1) All connections carrying pulsed currents must be very
short and as wide as possible. The loop area of these
connections must be made very small to reduce stray
inductance and radiated EMI.
2) A ceramic input filter capacitor should be placed close
to the V
IN
pin of the device. The bypass capacitor for
the V
CC
pin should also be placed close to the V
CC
pin. External compensation components should be
placed close to the IC and far from the inductor. The
feedback trace should be routed as far as possible
from the inductor.
3) The analog small-signal ground and the power ground
for switch ing currents must be kept separate. They
should be connected together at a point where switch-
ing activity is at minimum, typically the return terminal
of the V
CC
bypass capacitor. The ground plane should
be kept continuous as much as possible.
4) A number of thermal vias that connect to a large
ground plane should be provided under the exposed
pad of the device, for efficient heat dissipation.
Figure 4, 5, and 6 show the recommended component
placement for MAX17502 in TDFN and TSSOP packages.