Datasheet

MAX17497A/MAX17497B
AC-DC and DC-DC Peak Current-Mode Converters
with Integrated Step-Down Regulator
10Maxim Integrated
Pin Description
Pin Configuration
PIN NAME FUNCTION
1 EN/UVLO
Enable/Undervoltage-Lockout Pin. Drive to > 1.23V to start the devices. To externally program the
UVLO threshold of the input supply, connect a resistor-divider between input supply EN/UVLO and
SGND.
2 V
CC
Linear Regulator Output. Connect input bypass capacitor of at least 1FF from V
CC
to SGND as close
as possible to the IC.
3 OVI
Overvoltage Comparator Input. Connect a resistor-divider between the input supply (OVI) and SGND
to set the input overvoltage threshold.
4 RLIMF
Current-Limit Setting Pin. Connect a resistor between RLIMF and SGND to set the peak-current limit
for nonisolated flyback converter. Peak-current limit defaults to 500mA if unconnected.
5 SCOMPF
Slope Compensation Input Pin. Connect a resistor between SCOMPF and SGND to set slope comp
ramp. Connect to V
CC
for minimum slope comp. See the Programming the Slope Compensation for
the Flyback/Boost Converter (SCOMPF) section.
6 EAFN
Feedback/Inverting Input of the Error Amplifier for Nonisolated Flyback Converter. Connect to
midpoint of resistor-divider from the positive terminal of the output capacitor of the flyback/boost
converter to SGND.
7 COMPF
Error-Amplifier Output of Flyback/Boost Converter. Connect the frequency-compensation network
between COMPF and SGND. See Figure 9.
15
16
14
13
6
5
7
V
CC
RLIMF
8
EN/UVLO
LXB OUTB INB
12
PGNDF
4
12 11 9
LXF
EP
IN
SSF
COMPF
EAFN
SCOMPF
+
OVI PGNDB
3
10
RESETN
TQFN
TOP VIEW
MAX17497A
MAX17497B