Datasheet

Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
MAX17126/MAX17126A
32 _____________________________________________________________________________________
High-Accuracy, High-Voltage
Gamma Reference
Output-Voltage Selection
The output voltage of the high-accuracy LDO is set by
connecting a resistive voltage-divider from the output
(V
REF_O
) to AGND with the center tap connected to
V
REF_FB
(see Figure 1). Select R10 in the 10kI to 50kI
range. Calculate R9 with the following equation:
REF_O
REF_FB
V
R9 R10 -1
V
 
= ×
 
 
 
where V
REF_FB
, the LDO’s feedback set point, is 1.25V.
Place R9 and R10 close to the IC.
Input and Output Capacitor Selection
To ensure stability of the LDO, use a minimum of 1FF
on the regulator’s input (V
REF_I
) and a minimum of 2.2FF
on the regulator’s output (V
REF_O
). Place the capacitors
near the pins and connect their ground connections
directly together.
Set the PGOOD Threshold Voltage
PGOOD threshold voltage can be adjusted by connecting
a resistive voltage-divider from input V
IN
to GND with the
center tap connected to V
DET
(see Figure 1). Select R8 in
the 10kI to 50kI range. Calculate R7 with the following
equation:
 
= ×
 
 
IN_PGOOD
DET
V
R7 R8 -1
V
where V
DET =
1.25V is the V
DET
threshold set point.
V
IN_PGOOD
is the desired PGOOD threshold voltage.
Place R7 and R8 close to the IC.
PCB Layout and Grounding
Careful PCB layout is important for proper operation. Use
the following guidelines for good PCB layout:
U Minimize the area of respective high-current loops
by placing each DC/DC converter’s inductor, diode,
and output capacitors near its input capacitors and
its LX_ and PGND pins. For the step-down regulator,
the high-current input loop goes from the positive
terminal of the input capacitor to the IC’s IN2 pin, out
of LX2, to the inductor, to the positive terminals of the
output capacitors, reconnecting the output capaci-
tor and input capacitor ground terminals. The high-
current output loop is from the inductor to the positive
terminals of the output capacitors, to the negative
terminals of the output capacitors, and to the Schottky
diode (D2). For the step-up regulator, the high-current
input loop goes from the positive terminal of the input
capacitor to the inductor, to the IC’s LX1 pin, out of
PGND, and to the input capacitor’s negative terminal.
The high-current output loop is from the positive ter-
minal of the input capacitor to the inductor, to the out-
put diode (D1), to the positive terminal of the output
capacitors, reconnecting between the output capaci-
tor and input capacitor ground terminals. Connect
these loop components with short, wide connections.
Avoid using vias in the high-current paths. If vias
are unavoidable, use many vias in parallel to reduce
resistance and inductance.
U Create a power ground island for the step-down
regulator, consisting of the input and output capaci-
tor grounds and the diode ground. Connect all
these together with short, wide traces or a small
ground plane. Similarly, create a power ground island
(PGND) for the step-up regulator, consisting of the
input and output capacitor grounds and the PGND
pin. Create a power ground island (CPGND) for the
positive and negative charge pumps, consisting of
SUPP and output (V
GH
, V
GOFF
) capacitor grounds,
and negative charge-pump diode ground. Connect
the step-down regulator ground plane, PGND ground
plane, and CPGND ground plane together with wide
traces. Maximizing the width of the power ground
traces improves efficiency and reduces output volt-
age ripple and noise spikes.
U Create an analog ground plane (GND) consisting of
the GND pin, all the feedback divider ground con-
nections, the COMP, SS, and DLY1 capacitor ground
connections, and the device’s exposed backside
pad. Connect the PGND and GND islands by con-
necting the two ground pins directly to the exposed
backside pad. Make no other connections between
these separate ground planes.
U Place all feedback voltage-divider resistors as close
as possible to their respective feedback pins. The
divider’s center trace should be kept short. Placing
the resistors far away causes their FB traces to
become antennas that can pick up switching noise.
Care should be taken to avoid running any feedback
trace near LX1, LX2, DRVP, or DRVN.
U Place IN2 pin, VL pin, REF pin, and V
REF_O
pin
bypass capacitors as close as possible to the device.
The ground connection of the VL bypass capacitor
should be connected directly to the GND pin with a
wide trace.