Datasheet
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
26 _____________________________________________________________________________________
Considering the typical operating circuit in Figure 1, the
maximum load current I
OUT(MAX)
is 2.0A with a 3.3V
output and a 12V (typ) input voltage. Choosing an LIR of
0.4 at this operation point:
3.3V (12V - 3.3V)
L2 5.3 H
12V 750kHz 2A 0.3
×
= ≈
× × ×
F
Pick L2 = 4.7FH. At that operation point, both the ripple
current and peak current are:
( )
OUTB_RIPPLE
3.3V 12V - 3.3V
I 0.68A
750kHz 4.7 H 12V
×
= =
× ×F
OUTB_PEAK
0.68A
I 2A 2.34A
2
= + =
Input Capacitors
The input filter capacitors reduce peak currents drawn
from the power source and reduce noise and voltage
ripple on the input caused by the regulator’s switching.
They are usually selected according to input ripple-
current requirements and voltage rating, rather than
capacitance value. The input voltage and load current
determine the RMS input ripple current (I
RMS
):
( )
OUTB IN2 OUTB
RMS OUTB
IN2
V V - V
I I
V
×
= ×
The worst case is I
RMS
= 0.5 O I
OUTB
, which occurs at
V
IN2
= 2 O V
OUT
.
For most applications, ceramic capacitors are used
because of their high-ripple-current and surge-current
capabilities. For optimal circuit long-term reliability,
choose an input capacitor that exhibits less than +10NC
temperature rise at the RMS input current corresponding
to the maximum load current.
Output Capacitor Selection
Since the MAX17122’s step-down regulator is internally
compensated, it is stable with any reasonable amount
of output capacitance. However, the actual capacitance
and ESR affect the regulator’s output-voltage ripple
and transient response. The rest of this section deals
with how to determine the output capacitance and ESR
needs according to the ripple voltage and load-transient
requirements.
The output-voltage ripple has two components: varia-
tions in the charge stored in the output capacitor, and
the voltage drop across the capacitor’s ESR caused by
the current into and out of the capacitor:
OUTB_RIPPLE OUTB_RIPPLE(ESR) OUTB_RIPPLE(C)
V V V= +
OUTB_RIPPLE(ESR) OUTB_RIPPLE ESR_OUTB
V I R= ×
OUTB_RIPPLE
OUTB_RIPPLE(C)
OUTB SW
I
V
8 C f
=
× ×
where I
OUTB
_
RIPPLE
is defined in the Step-Down
Regulator and Inductor Selection sections, C
OUTB
(C5
in Figure 1) is the output capacitance, and R
ESR
_
OUTB
is the ESR of output capacitor C
OUT
. In Figure 1’s circuit,
the inductor ripple current is 0.68A. If the voltage-ripple
requirement of Figure 1’s circuit is Q1% of the 3.3V out-
put, then the total peak-to-peak ripple voltage should
be less than 66mV. Assuming that the ESR ripple and
the capacitive ripple each should be less than 50% of
the total peak-to-peak ripple, then the ESR should be
less than 48.5mI and the output capacitance should
be greater than 3.4FF to meet the total ripple require-
ment. A 22FF capacitor with ESR (including PCB trace
resistance) of 10mI is selected for the typical operating
circuit in Figure 1, which easily meets the voltage-ripple
requirement.
The step-down regulator’s output capacitor and ESR
also affect the voltage undershoot and overshoot when
the load steps up and down abruptly. The undershoot
and overshoot also have two components: the voltage
steps caused by ESR and voltage sag, and soar due to
the finite capacitance and inductor slew rate. Use the
following formulas to check if the ESR is low enough
and the output capacitance is large enough to prevent
excessive soar and sag.
The amplitude of the ESR step is a function of the load
step and the ESR of the output capacitor:
OUTB_ESR_STEP OUTB ESR_OUTB
V I R= ∆ ×
The amplitude of the capacitive sag is a function of the
load step, the output capacitor value, the inductor value,
the input-to-output voltage differential, and the maximum
duty cycle:
( )
2
2 OUTB
OUTB_SAG
OUTB IN2(MIN) MAX OUTB
L ( I )
V
2 C V D - V
× ∆
=
× × ×