Datasheet

Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
______________________________________________________________________________________ 25
GATE is resistively pulled up towards IN2 during initial
startup. Once DLY1 passes above 1.25V, a 160FA
current source starts to pull down on GATE, turning on
external pMOS switch Q1 and enabling the step-up
regulator. When V
GATE
reaches its GATE_OK threshold
(V
IN
- 5.5V), the step-up regulator switch is allowed to
toggle. A 10FA current source charges the SS capacitor
pin and when the SS voltage reaches 1.25V, soft-start is
done. The FB1 fault-detection circuit is enabled after the
step-up regulator finishes its soft-start.
The positive charge-pump linear regulator is enabled
after the step-up regulator finishes its soft-start and DLY2
is above 1.25V. The FBP fault-detection circuit is enabled
after the positive linear regulator finishes its soft-start.
Fault Protection
During steady-state operation, if any of the five regula-
tors’ output (step-down regulator, step-up regulator,
positive linear regulator, boost-buck regulator, and
gate-off linear regulator) goes lower than its respective
fault-detection threshold, the MAX17122 activates an
internal fault timer. If any condition, or the combination
of conditions, indicates a continuous fault for the fault-
timer duration (50ms typ), the MAX17122 shuts down
temporarily for approximately 160ms (typ) and then
restarts. During restart, if any output voltage is below its
fault threshold at the end of its soft-start period, the IC
immediately shuts down again. This feature is only active
after a fault shutdown has occurred. It does not apply to
the initial startup, where the 50ms timer always applies.
Once all outputs have started properly after a restart, the
50ms fault timer is reenabled. The IC restarts indefinitely
for a continuous fault condition and never shuts down
permanently or waits for power cycling.
If a short to ground occurs on the step-down regulator,
step-up regulator, positive linear regulator, or boost-
buck regulator, no fault timer is applied and the IC imme-
diately shuts down. No harm occurs if the gate-off linear
regulator is shorted to ground, so this feature is omitted
for that output.
Thermal-Overload Protection
The thermal-overload protection prevents excessive
power dissipation from overheating the MAX17122.
When the junction temperature exceeds T
J
= +160NC, a
thermal sensor immediately activates the fault protection,
which shuts down all the outputs. Cycle the input voltage
to clear the fault latch and restart the MAX17122.
The thermal-overload protection protects the controller
in the event of fault conditions. For continuous operation,
do not exceed the absolute maximum junction tempera-
ture rating of T
J
= +150NC.
Design Procedure
Step-Down Regulator
Inductor Selection
Three key inductor parameters must be specified: induc-
tance value (L), peak current (I
PEAK
), and DC resistance
(R
DC
). The following equation includes a constant (LIR),
which is the ratio of peak-to-peak inductor ripple current
to DC load current. A higher LIR value allows smaller
inductance, but results in higher losses and higher
ripple. A good compromise between size and losses is
typically found at a 30% ripple-current-to-load-current
ratio (LIR = 0.3), which corresponds to a peak inductor
current 1.15 times the DC load current:
( )
OUTB IN2 OUTB
2
IN2 SW OUTB(MAX)
V V - V
L
V f I LIR
×
=
× × ×
where I
OUTB(MAX)
is the maximum DC load current,
and the switching frequency (f
SW
) is 750kHz. The exact
inductor value is not critical and can be adjusted to make
trade-offs among size, cost, and efficiency. Lower induc-
tor values minimize size and cost, but they also increase
the output ripple and reduce the efficiency due to higher
peak currents. On the other hand, higher inductor values
increase efficiency, but at some point resistive losses
due to extra turns of wire will exceed the benefit gained
from lower AC current levels.
The inductor’s saturation current must exceed the peak
inductor current. The peak current can be calculated by:
( )
OUTB IN2 OUTB
OUTB_RIPPLE
SW 2 IN2
V V - V
I
f L V
×
=
× ×
OUTB_RIPPLE
OUTB_PEAK OUTB(MAX)
I
I I
2
= +
The inductor’s DC resistance should be low for good
efficiency. Find a low-loss inductor having the lowest
possible DC resistance that fits in the allotted dimen-
sions. Ferrite cores are often the best choice. Shielded-
core geometries help keep noise, EMI, and switching
waveform jitter low.