Datasheet

Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
22 _____________________________________________________________________________________
Temperature-Compensated
Boost-Buck Regulator
The boost-buck regulator employs a current-mode,
fixed-frequency PWM architecture to maximize loop
bandwidth and provide fast-transient response to pulsed
loads typical of TFT LCD panel source drivers. The inte-
grated MOSFET and the built-in digital soft-start function
reduce the number of external components required
while controlling inrush currents. The maximum negative
output voltage can be set to -36V relative to V
IN3
with
an external resistive voltage-divider. The regulator con-
trols the output voltage and the power delivered to the
output by modulating duty cycle D of the internal power
MOSFET in each switching cycle. The duty cycle of the
MOSFET is approximated by:
GOFF2 D3
BB
IN3 D3 GOFF2 LX3
-V V
D
V V - V - V
+
≈
+
where V
GOFF2
is the output voltage of the boost-buck
regulator, V
D3
is the voltage drop across diode D3, and
V
LX3
is the voltage drop across the internal MOSFET.
PWM Control Block
An error amplifier compares the signal at FB3 to a
reference voltage, which is determined by temperature-
compensation logic, and changes the COMP3 output.
The voltage at COMP3 sets the peak inductor current.
As the load varies, the error amplifier sources or sinks
current to the COMP3 output accordingly to produce
the inductor peak current necessary to service the load.
To maintain stability at high duty cycles, a slope-
compensation signal is summed with the current-sense
signal.
On the rising edge of the internal clock, the controller
sets a flip-flop, turning on the p-channel MOSFET and
applying the input voltage across the inductor. The
current through the inductor ramps up linearly, storing
energy in its magnetic field. Once the sum of the current-
feedback signal and the slope compensation exceed
the COMP3 voltage, the controller resets the flip-flop
and turns off the MOSFET. Since the inductor current
is continuous, a transverse potential develops across
the inductor that turns on diode D3. The voltage across
the inductor then becomes the negative output voltage.
This discharge condition forces the current through the
inductor to ramp back down, transferring the energy
stored in the magnetic field to the output capacitor and
the load. The MOSFET remains off for the rest of the
clock cycle.
Temperature Compensation
The GOFF2 boost-buck regulator output varies with tem-
perature to compensate for lower TFT mobility at cold
temperatures. The output voltage is typically -12V at
+25NC and warmer, and -20V at 0NC and colder, with a
gradual change between +25NC and 0NC.
The circuit involves two constant voltages and one tem-
perature-dependent voltage. The first constant voltage is
internally fixed at half of 3.3V (1.65V). The other constant
voltage should be less than 1.65V and is chosen by con-
necting resistor R
SET
from the 100FA current source at
the SET pin to AGND. The temperature-dependent volt-
age is developed by the network attached to the 100FA
current source at the NTC pin. The NTC voltage is sub-
tracted from the 3.3V reference to provide the variable
voltage with the correct temperature slope.
If the differential voltage between the 3.3V reference
and the NTC pin is greater than 1.65V, then the 1.65V
voltage is used as the reference for the error amplifier at
FB3. This sets the warm-range output of the boost-buck
regulator. If the differential voltage between 3.3V
reference and the NTC pin is less than the voltage at
the SET pin, then the SET pin voltage is used as the
reference for the error amplifier at FB3. This sets the
cool-range output of the boost-buck regulator. If neither
is true, then the differential voltage itself is used as the
reference for the error amplifier at FB3.
These conditions are mutually exclusive as long as the
SET pin voltage is less than 1.65V. If the SET pin volt-
age is greater than 1.65V, which would be true if SET
was left open, then 1.65V is used as the reference for
the error amplifier at FB3 regardless of the differential
voltage between 3.3V reference and the NTC pin. This
ensures a defined behavior of operation and provides
a “disable” mode for the function. The minimum voltage
on SET is 0.1V.
The thermistor network and resistor on SET can be
adjusted to program almost any temperature variation
desired, limited to two output levels with a smooth transi-
tion between. Figure 4 shows the block diagram of the
temperature-compensation function and Figure 5 shows
the reference voltages and output voltage behavior for
the typical application components.