Datasheet
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
14 _____________________________________________________________________________________
Pin Description (continued)
PIN NAME FUNCTION
17 SS
Step-Up Regulator Soft-Start Input. Connect a capacitor at SS to control the step-up regulator soft-
start ramp time. The capacitor charge current is 10FA and the SS voltage ramps from 0 to 1.25V
for a zero-to-full-scale regulated output.
18 DRVN
GOFF1 Negative Linear-Regulator Controller Base-Drive Output. Open drain of an internal
p-channel MOSFET. Connect DRVN to the base of the external npn output transistor as shown
in the typical operating circuit (Figure 1). The buffer can source current from ground to GOFF2
to maintain a regulated voltage on GOFF1 as measured at FBN.
19 DLY2
Positive Charge-Pump Linear-Regulator Delay Input. Connect a capacitor from DLY2 to AGND to
set the delay time between the step-up regulator and the startup of the positive charge pump. An
8FA current source charges C
DLY2
. DLY2 is internally pulled to AGND until the step-down soft-
start is finished or when either EN1 or EN2 is low or VL is below its UVLO threshold.
20 FBP
Positive Charge-Pump Linear-Regulator Feedback Input. Connect FBP to the center of a resistive
voltage-divider between the positive charge-pump output and AGND to set the positive charge-
pump output voltage. Place the resistive voltage-divider within 5mm of FBP.
21 DRVP
Positive Charge-Pump Linear-Regulator Controller Base-Drive Output. Open drain of an internal
n-channel MOSFET. Connect DRVP to the base of the external pnp transistor as shown in the
typical operating circuit (Figure 1). The buffer can source current from AVDD to the charge-pump
diodes to maintain a regulated voltage on GON as measured at FBP.
22 RESET
Open-Drain Power-Good Output. Monitors the step-down output voltage. RESET is connected to
AGND whenever the internal feedback voltage is less than its power-good threshold and DEL is
less than 1.25V. RESET is high impedance whenever the internal feedback voltage is greater than
the threshold and DEL is greater than 1.25V.
23 DEL
Power-Good Reset Timing Pin. Connect a capacitor from DEL to AGND to set the step-down
output-rising RESET delay. An 8FA current source charges C
DEL
.
25 SET
GOFF2 Cold-Temperature Reference-Voltage Input. Connect a resistor from SET to AGND to set
the cold-temperature GOFF2 reference level. The SET output current is 100FA (typ). Leave SET
unconnected or connect to 3.3V if GOFF2 temperature compensation is not used.
26 NTC
Thermistor Network Connection Input. Connect a network including a thermistor from NTC to
AGND to control the temperature behavior of the GOFF2 output voltage. If thermal compensation
is not used, NTC may be left unconnected or connected to AGND.
27 FB3
GOFF2 Regulator Feedback Input. FB3 regulates at 1.65V nominal and can vary from 0.1V to
1.65V with temperature according to the voltages on SET and NTC. Connect FB3 to the center of
a resistive voltage-divider between the regulator output and a 3.3V reference to set the GOFF2
regulator output voltage.
28 COMP3
Compensation Pin for the Boost-Buck Error Amplifier. Connect a series resistor and capacitor from
COMP3 to AGND. Typical values are 5kI and 4.7nF.
29, 36 N.C. No Connection. Not internally connected.
30 LX3
GOFF2 Boost-Buck Regulator Switching Node. LX3 is the source of the internal n-channel
MOSFET connected between IN3 and LX3. Connect the inductor and Schottky catch diode to LX3
and minimize the trace area for low EMI.