Datasheet

MAX17113
Low-Cost, Multiple-Output
Power Supply for LCD TVs
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On the rising edge of the internal clock, the controller
sets a flip-flop, turning on the n-channel MOSFET and
applying the input voltage across the inductor. The cur-
rent through the inductor ramps up linearly, storing
energy in its magnetic field. Once the sum of the current-
feedback signal and the slope compensation exceed the
COMP voltage, the controller resets the flip-flop and turns
off the MOSFET. Since the inductor current is continuous,
a transverse potential develops across the inductor that
turns on the diode (D1). The voltage across the inductor
then becomes the difference between the output voltage
and the input voltage. This discharge condition forces
the current through the inductor to ramp back down,
transferring the energy stored in the magnetic field to the
output capacitor and the load. The MOSFET remains off
for the rest of the clock cycle.
Step-Up Regulator Internal
p-Channel MOSFET Pass Switch
The MAX17113 includes an integrated 130mΩ high-
voltage p-channel MOSFET to allow true shutdown of
the step-up converter output (AVDD). This switch is typ-
ically connected in series between the step-up regula-
tor’s Schottky catch diode and its output capacitors. In
addition to allowing step-up output to discharge com-
pletely when disabled, this switch also controls the
startup inrush current into the step-up regulator’s out-
put capacitors.
Soft-Start
The step-up regulator includes a 7-bit soft-start DAC
that steps its internal reference voltage from 0 to 1.25V
in 128 steps. This DAC also controls linearly the gate of
the pMOS switch, which is in between SWI and SWO,
and the output AVDD goes up smoothly, and when the
AVDD reaches the input voltage, the step-up regulator
takes over seamlessly and the output-voltage AVDD
reaches its regulation point. The soft-start period is
10ms (typ) and FB1 fault detection is disabled during
this period. The soft-start feature effectively limits the
inrush current during startup.
Positive Charge-Pump Regulator
The positive charge-pump regulator is typically used to
generate the positive supply rail for the TFT LCD gate
driver ICs. The output voltage is set with an external
resistive voltage-divider from its output to GND with the
midpoint connected to FBP. The number of charge-
pump stages and the setting of the feedback divider
determine the output voltage of the positive charge-
pump regulator. The charge pump includes a high-side
p-channel MOSFET (P1) and a low-side n-channel
MOSFET (N1) to control the power transfer as shown in
Figure 3.
During the first half-cycle, N1 turns on and charges fly-
ing capacitors C20 and C21 (Figure 3). During the sec-
ond half cycle, N1 turns off and P1 turns on, level
shifting C20 and C21 by V
AVDD
volts. If the voltage
across C23 plus a diode drop (V
OUT
+ V
D
) is smaller
than the level-shifted flying capacitor voltage (V
C20
+
V
AVDD
), charge flows from C20 to C23 until the diode
(D5) turns off. The amount of charge transferred to the
output is determined by the error amplifier that controls
N1’s on-resistance.
REF
1.25V
OSC
ERROR
AMPLIFIER
P1
N1
DRVP
C22
D5
C23
C20
C21
CPGND
SWO
FBP
POSITIVE CHARGE-PUMP REGULATOR
AV
DD
OUTPUT
MAX17113
Figure 3. Positive Charge-Pump Regulator Block Diagram