Datasheet

Loop Compensation
Choose R
COMP
to set the high-frequency integrator
gain for fast-transient response. Choose C
COMP
to set
the integrator zero to maintain loop stability.
For low-ESR output capacitors, use the following equa-
tions to obtain stable performance and good transient
response:
To further optimize transient response, vary R
COMP
in
20% steps and C
COMP
in 50% steps while observing
transient-response waveforms.
LDO Output Voltage
The output voltage of the LDO is adjusted by connect-
ing a resistive voltage-divider from the output (V
LDOO
)
to AGND with the center tap connected to LDOADJ
(see Figure 1). Select R8 in the 10kΩ to 50kΩ range.
Calculate R7 with the following equation:
Place R7 and R8 close to the IC.
Connect a 1µF low equivalent-series-resistance (ESR)
capacitor between LDOO and AGND to ensure stability
and to provide good output-transient performance.
Input-Voltage Detector
Adjust the falling-edge threshold (V
DETECT(FALLING)
) of
the voltage being monitored (V
DETECT
) by connecting a
resistive voltage-divider from V
DETECT
to AGND with
the center tap connected to VDET. Select R6 in the
10kΩ to 1000kΩ range. Calculate R5 with the following
equation:
Place R5 and R6 close to the IC. Due to the 50mV hys-
teresis of the voltage-detector comparator, the rising-
edge threshold (V
DETECT(RISING)
) is related to the
falling-edge threshold set above by:
Adjust the delay between the time V
DETECT
has
reached its rising threshold set by R5 and R6 above
and the time RST goes high by connecting a capacitor
between CD and AGND with the following equation:
Gate-Off Linear-Regulator Controller
The output voltage of the negative linear regulator is
adjusted by connecting a resistive voltage-divider from
V
VGL
to REF with the center tap connected to FBN (see
Figure 1). Select R10 in the 10kΩ to 50kΩ range.
Calculate R9 using the following equation:
Place R9 and R10 close to the IC.
Applications Information
Power Dissipation
An IC’s maximum power dissipation depends on the
thermal resistance from the die to the ambient environ-
ment and the ambient temperature. The thermal resis-
tance depends on the IC package, PCB copper area,
other thermal mass, and airflow.
The MAX17103, with its exposed backside paddle sol-
dered to 1in
2
of PCB copper, can dissipate approxi-
mately 1990mW into +70°C still air. More PCB copper,
cooler ambient air, and more airflow increase the possi-
ble dissipation, while less copper or warmer air
decreases the IC’s dissipation capability. The major
components of power dissipation are the power dissi-
pated in the step-up regulator and the power dissipated
by the operational amplifier.
The MAX17103’s largest on-chip power dissipation
occurs in the step-up switch, the VCOM amplifier, the
LDO, and the high-voltage scan-driver outputs.
Step-Up Regulator
The largest portions of the power dissipated by the
step-up regulator are the internal MOSFET, the induc-
tor, and the output diode. If the step-up regulator with
3.3V input and 290mA output has approximately 85%
efficiency, approximately 5% of the power is lost in the
internal MOSFET, approximately 3% in the inductor,
and approximately 5% in the output diode. The remain-
ing few percent are distributed among the input and
output capacitors and the PCB traces. If the input
power is about 2.8W, the power lost in the internal
MOSFET is approximately 140mW.
R
V
V
R
VGL
9
124
10=×
.
C
T
k
CD
DELAY
=
120 Ω
VV mV
R
R
DETECT RISING DETECT FALLING() ( )
=+×+50 1
5
66
⎛
⎝
⎜
⎞
⎠
⎟
RR
V
V
DETECT FALLING
56
11
1=×
⎛
⎝
⎜
⎜
⎞
⎠
⎟
⎟
()
.
-
RR
V
V
LDOO
78
124
1=×
⎛
⎝
⎜
⎞
⎠
⎟
.
-
C
VLI
VR
COMP
MAIN MAIN MAX
IN COMP
≈
×××
×
40
2
()
()
R
VV C
LI
COMP
IN MAIN OUT
MAIN MAX
≈
×× ×
×
400
()
MAX17103/AUO-P1721.14
DC-DC Converter with Integrated Scan Driver,
VGL Controller, Op Amp, and LDO for TFT LCD
______________________________________________________________________________________ 25