Datasheet

MAX17103/AUO-P1721.14
Low-Dropout Linear Regulator (LDO)
The MAX17103 has an integrated 0.8Ω pass element
and can provide at least 350mA. The output voltage is
accurate within ±1%.
Gate-Off Linear-Regulator Controller
The negative linear controller provides a regulated gate-
off voltage (VGL) for the TFT-LCD gate drivers by con-
trolling the base drive current to an npn transistor typi-
cally connected to an unregulated negative charge
pump as shown in Figure 1. The guaranteed base drive
current that can be provided by DRVN is at least 1mA.
During power-up, DRVN is prevented from providing
base current to the npn transistor until 32ms after V
MAIN
has reached 90% of its regulation voltage, keeping VGL
off until this time.
DC-DC Converter with Integrated Scan Driver,
VGL Controller, Op Amp, and LDO for TFT LCD
22 ______________________________________________________________________________________
VDET
t
DELAY
= 120k x C
CD
V
IN
POWER-UP
LDOO
1.1V + 50mV
TIME
VOLTAGE
1.1V
0
0
0
0
V
IN
V
LDOO
V
LDOO
x R6/(R5 + R6)
V
LDOO
POWER-DOWN
RST
Figure 7. Voltage-Detector Power-Up and Power-Down Timing